JPS6183046U - - Google Patents
Info
- Publication number
- JPS6183046U JPS6183046U JP1984169644U JP16964484U JPS6183046U JP S6183046 U JPS6183046 U JP S6183046U JP 1984169644 U JP1984169644 U JP 1984169644U JP 16964484 U JP16964484 U JP 16964484U JP S6183046 U JPS6183046 U JP S6183046U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- groove
- main part
- resin material
- thin metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本案の一実施例を示す側断面図、第2
図は第1図の要部拡大図、第3図は従来例の側断
面図、第4図は第3図の要部拡大図である。
図中、1は放熱板、2は溝部、2aは突出部、
3は半導体素子、4はリード、5は金属細線、6
は樹脂材である。
Figure 1 is a side sectional view showing one embodiment of the present invention, Figure 2
The figures are an enlarged view of the main part of Fig. 1, Fig. 3 is a side sectional view of the conventional example, and Fig. 4 is an enlarged view of the main part of Fig. 3. In the figure, 1 is a heat sink, 2 is a groove, 2a is a protrusion,
3 is a semiconductor element, 4 is a lead, 5 is a thin metal wire, 6
is a resin material.
Claims (1)
を固定すると共に、それの電極とリードとを金属
細線にて接続し、かつ半導体素子を含む主要部分
を樹脂材にてモールド被覆したものにおいて、上
記溝部の底面に山形の突出部を形成したことを特
徴とする半導体装置。 A semiconductor element is fixed to a heat dissipation plate having a shaped groove on the upper surface, and its electrodes and leads are connected with thin metal wires, and the main part including the semiconductor element is molded and covered with a resin material, and the above-mentioned A semiconductor device characterized in that a chevron-shaped protrusion is formed on the bottom surface of a groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984169644U JPS6183046U (en) | 1984-11-07 | 1984-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984169644U JPS6183046U (en) | 1984-11-07 | 1984-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6183046U true JPS6183046U (en) | 1986-06-02 |
Family
ID=30727363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984169644U Pending JPS6183046U (en) | 1984-11-07 | 1984-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6183046U (en) |
-
1984
- 1984-11-07 JP JP1984169644U patent/JPS6183046U/ja active Pending
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