JPS6232548U - - Google Patents
Info
- Publication number
- JPS6232548U JPS6232548U JP1985124969U JP12496985U JPS6232548U JP S6232548 U JPS6232548 U JP S6232548U JP 1985124969 U JP1985124969 U JP 1985124969U JP 12496985 U JP12496985 U JP 12496985U JP S6232548 U JPS6232548 U JP S6232548U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- lead
- semiconductor device
- resin
- element mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の第１の実施例を示す半導体装
置の概略縦断面図、第２図は従来の半導体装置の
概略縦断面図、第３図は従来の他の半導体装置の
一部を示す概略縦断面図、第４図は本考案の第２
の実施例を示す半導体装置の概略縦断面図、第５
図は本考案の第３の実施例を示す半導体装置の概
略底面図である。
１１……素子搭載部、１２……リード（内部リ
ード）、１２ａ……リードの露出部分、１３……
半導体素子、１５……樹脂部、１６……金属突起
。
FIG. 1 is a schematic vertical sectional view of a semiconductor device showing a first embodiment of the present invention, FIG. 2 is a schematic vertical sectional view of a conventional semiconductor device, and FIG. 3 shows a part of another conventional semiconductor device. The schematic vertical sectional view shown in FIG. 4 is the second one of the present invention.
A schematic longitudinal cross-sectional view of a semiconductor device showing an example of
The figure is a schematic bottom view of a semiconductor device showing a third embodiment of the present invention. DESCRIPTION OF SYMBOLS 11...Element mounting part, 12...Lead (internal lead), 12a...Exposed part of lead, 13...
Semiconductor element, 15...resin part, 16...metal protrusion.
Claims (1)
子搭載部の周囲に配設され前記半導体素子に接続
されたリードとが、樹脂部で封止された半導体装
置において、 前記リードを、その裏面の一部の露出部分を残
してその全体を前記樹脂部内に埋設し、かつその
露出部分に、下方向に突出する金属突起を形成し
たことを特徴とする半導体装置。 ２ 前記リードを折曲形成し、前記素子搭載部の
下側の樹脂部を他の部分のそれと比較して肉厚に
形成したことを特徴とする実用新案登録請求の範
囲第１項記載の半導体装置。 ３ 前記金属突起を前記樹脂部の底面に千鳥状に
配置したことを特徴にする実用新案登録請求の範
囲第１項記載の半導体装置。[Claims for Utility Model Registration] 1. In a semiconductor device in which an element mounting part fixed to a semiconductor element and a lead arranged around the element mounting part and connected to the semiconductor element are sealed with a resin part. . A semiconductor device, wherein the lead is entirely buried in the resin part, leaving a part of the back surface exposed, and a metal protrusion projecting downward is formed in the exposed part. 2. The semiconductor according to claim 1, wherein the lead is bent and the resin portion below the element mounting portion is thicker than other portions. Device. 3. The semiconductor device according to claim 1, wherein the metal protrusions are arranged in a staggered manner on the bottom surface of the resin portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985124969U JPS6232548U (en) | 1985-08-14 | 1985-08-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985124969U JPS6232548U (en) | 1985-08-14 | 1985-08-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6232548U true JPS6232548U (en) | 1987-02-26 |
Family
ID=31017455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985124969U Pending JPS6232548U (en) | 1985-08-14 | 1985-08-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6232548U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0180473U (en) * | 1987-11-20 | 1989-05-30 |
-
1985
- 1985-08-14 JP JP1985124969U patent/JPS6232548U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0180473U (en) * | 1987-11-20 | 1989-05-30 |