JPS6185932U - - Google Patents

Info

Publication number
JPS6185932U
JPS6185932U JP1984170654U JP17065484U JPS6185932U JP S6185932 U JPS6185932 U JP S6185932U JP 1984170654 U JP1984170654 U JP 1984170654U JP 17065484 U JP17065484 U JP 17065484U JP S6185932 U JPS6185932 U JP S6185932U
Authority
JP
Japan
Prior art keywords
delay
circuit
delay lines
inverter
delaying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984170654U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984170654U priority Critical patent/JPS6185932U/ja
Publication of JPS6185932U publication Critical patent/JPS6185932U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案遅延時間補償回路の一実施例を
示すブロツク説明図、第２図はその回路を流れる
波形を示す説明図、第３図は従来の遅延線の一例
を示すブロツク説明図、第４図はその回路を流れ
る波形を示す説明図である。 １，１１，１２：遅延線、２１，２２：インバ
ータ。

Claims (1)

    【実用新案登録請求の範囲】
  1. デジタル信号を遅延させる回路に於いて、少な
    くとも二個の遅延線を用いると共に、該遅延線は
    、反転器を介して直列に接続して構成されること
    を特徴とする遅延線の遅延時間補償回路。
JP1984170654U 1984-11-09 1984-11-09 Pending JPS6185932U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984170654U JPS6185932U (ja) 1984-11-09 1984-11-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984170654U JPS6185932U (ja) 1984-11-09 1984-11-09

Publications (1)

Publication Number Publication Date
JPS6185932U true JPS6185932U (ja) 1986-06-05

Family

ID=30728363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984170654U Pending JPS6185932U (ja) 1984-11-09 1984-11-09

Country Status (1)

Country Link
JP (1) JPS6185932U (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4946366A (ja) * 1972-09-06 1974-05-02
JPS5783922A (en) * 1980-11-12 1982-05-26 Fujitsu Ltd Delay circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4946366A (ja) * 1972-09-06 1974-05-02
JPS5783922A (en) * 1980-11-12 1982-05-26 Fujitsu Ltd Delay circuit

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