JPS6190452A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS6190452A
JPS6190452A JP59212101A JP21210184A JPS6190452A JP S6190452 A JPS6190452 A JP S6190452A JP 59212101 A JP59212101 A JP 59212101A JP 21210184 A JP21210184 A JP 21210184A JP S6190452 A JPS6190452 A JP S6190452A
Authority
JP
Japan
Prior art keywords
lead
leads
adjacent
dimension
narrower
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59212101A
Other languages
Japanese (ja)
Inventor
Shoichi Ogura
小倉 昭一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59212101A priority Critical patent/JPS6190452A/en
Publication of JPS6190452A publication Critical patent/JPS6190452A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable secure automatic bonding so as to perform mounting of higher density, by a method wherein leads adjacent to each other are put in the relation of mutual engagement of wider parts and narrower parts by forming lead tips into these two parts. CONSTITUTION:In the titled lead frame having tabs for mounting and fixing semiconductor elements on and many leads with tips arranged so as to surround the tabs, the many leads are composed of two kinds of leads 3a and 3b adjacent to each other, each of which leads has the reference lead width A. The lead 3a has a wider dimension B enough for wire bonding at the tipmost part and a narrower dimension C following thereto. The lead 3b adjacent to that lead is in the relation of mutual engagement of the wider part and the narrower part, having the narrower part at the tipmost part and the wider part for wire bonding continuous thereto. Therefore, the gap dimension between adjacent leads can be kept at a fixed dimension of G.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体ペレットを載置固着する1個のタブと
、このタブの周囲を囲むように配置された多数のリード
とを有する単位区分の多数が細長く連なってテープ状に
形成されており、主として樹脂封止半導体装置の組立に
用いられるリードフレームに関する。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a unit section having one tab on which a semiconductor pellet is placed and fixed, and a large number of leads arranged so as to surround this tab. Many of them are connected in a tape-like manner, and are mainly related to lead frames used for assembling resin-sealed semiconductor devices.

〔従来の技術〕[Conventional technology]

樹脂封止型のICを作る場合、第2図に示すような、金
属薄板にエツチングt7’cはプレス加工にて形成した
ところの半導体ペレットを載置固着するためのタブ1と
、このタブ1の周囲を先端部が取囲むように配置された
多数のリード2とを備えた単位区分が多数−列に連ねら
れたテープ状のリードフレームが用いられる。そして、
タブlに半導体ペレットを載置固着し、各リードの先端
部と半導体ペレットの対応電極とを金属細線で接続し、
ペレットおよびリード先端部を樹脂で封止することKよ
シ組立てられる。
When making a resin-sealed IC, as shown in Fig. 2, etching t7'c on a metal thin plate is a tab 1 for placing and fixing a semiconductor pellet formed by press working, and this tab 1. A tape-shaped lead frame is used in which a large number of unit sections are arranged in rows, each having a large number of leads 2 arranged such that their tips surround the periphery of the lead frame. and,
A semiconductor pellet is placed and fixed on the tab L, and the tip of each lead and the corresponding electrode of the semiconductor pellet are connected with a thin metal wire.
It is assembled by sealing the pellet and the tip of the lead with resin.

ところで、金属細線によるベレットとリードとの間の接
続は自動ボンダにより行なわれるのが普通である。しか
し、自動ポンディングの際に、各リード先端部が定めら
れた位置で、ボンディングに必要な200μm口の面積
を有することが必要である。若し、リードの変形により
、リード先端部が定められた位置からずれたシ、高密度
化によりリード先端部の面積が小さいときには、自動ボ
ンダによる金属細線の接続が正常に行なわれず、半導体
装置として致命的な欠陥を生じることになる。
Incidentally, the connection between the pellet and the lead using the thin metal wire is normally made by an automatic bonder. However, during automatic bonding, it is necessary for each lead tip to have a 200 μm opening area at a defined position, which is necessary for bonding. If the tip of the lead deviates from the specified position due to deformation of the lead, or if the area of the tip of the lead is small due to high density, the automatic bonder will not be able to connect the thin metal wires properly, and the semiconductor device will fail. This will result in a fatal flaw.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

近年、ICの機能拡大、リード数の増加、高密度化、小
型化が進展し、それと共に、リードフレームのリードは
細くなっている。そのため非常に変形し易く、それに加
えて、プレス打抜き加工やエツチング加工によるリード
フレームの製造法では、リード先端部(インナーリード
)の最小間隔(最小抜き間隔)は、リードフレームの板
厚程度が限界であるため、高密度のIC組立歩留の低下
という問題が生じている。
In recent years, the functions of ICs have expanded, the number of leads has increased, density has increased, and miniaturization has progressed, and along with this, the leads of lead frames have become thinner. Therefore, it is very easy to deform, and in addition, when manufacturing lead frames by press punching or etching, the minimum interval (minimum punching interval) between lead tips (inner leads) is limited by the thickness of the lead frame. Therefore, a problem arises in that the yield of high-density IC assembly is reduced.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点に対し、本発明では、半導体ペレットを載1
固着するタブの周囲を囲むように配置されたリードフレ
ームのリード先端部には幅広部と幅狭部とが形成され、
F49合うリード同志で、前記幅広部と幅狭部は互いに
入り込みの関係にあり、リード間の間隙がほぼ一定に保
たれている。
In order to solve the above problems, in the present invention, semiconductor pellets are
A wide part and a narrow part are formed at the lead end of the lead frame, which is arranged so as to surround the periphery of the tab to be fixed.
F49 When the leads match each other, the wide portion and the narrow portion are in a mutually intersecting relationship, and the gap between the leads is kept almost constant.

〔実施例〕〔Example〕

つぎに本発明を実施例により説明する。 Next, the present invention will be explained by examples.

第1図は本発明の一実施例に係るリードフレームのリー
ド先端部の部分平面図である。図において、多数のリー
ドは互いに隣υ合う2種類のIJ +ド3aと3bから
構成され、それぞれは基準リード幅Aで、リード3aの
最先端部は、ワイヤボンディングに充分な幅広寸法Bと
それに続いて幅狭寸法Cとなっており、その隣り合うリ
ード3bは、幅広部と幅狭部とが互いに入り込んだ関係
にあって、最先端部は幅狭部で、それに続いてワイヤボ
ンディングする幅広部になってお)、従って、隣り合う
リード間の間隙寸法はGの一定寸法に保持されている。
FIG. 1 is a partial plan view of a lead tip portion of a lead frame according to an embodiment of the present invention. In the figure, a large number of leads are composed of two types of IJ+ leads 3a and 3b adjacent to each other, each having a standard lead width A, and the leading edge of the lead 3a having a wide dimension B sufficient for wire bonding and Next, there is a narrow dimension C, and in the adjacent leads 3b, the wide part and the narrow part are in a relationship such that the leading edge part is the narrow part, followed by the wide part to be wire bonded. Therefore, the gap size between adjacent leads is maintained at a constant size G.

〔発明の効果〕〔Effect of the invention〕

本発明では、リードピッチPKは当然A+Gである。自
動ボンダによるボンディング可能最小リード幅を幅広部
Bにとり、リードフレーム製造上の最小のリード間隙寸
法をGとすると、従来のリードピッチPoはB+Gであ
る。従って、従来のピッチP、に対する本発明のリード
ピッチP1の減少率はP1/P0=A+G/B+Gとな
る。ここでA==1.50゜B=2C,C=Gとすれば
、PI/P(1:暑中0.83となり、従来のリードピ
ッチに比べ約801sのピッチで済むことになる。した
がって、同じリード数のリードフレームにおいては、よ
り確実な自動ボンディングが可能となり、ま九、同じ大
きさの)(ツケージにおいては、より多数のピン、すな
わち、より高密度の実装が可能となる。
In the present invention, the lead pitch PK is naturally A+G. If the wide portion B is the minimum lead width that can be bonded by an automatic bonder, and G is the minimum lead gap dimension for manufacturing a lead frame, the conventional lead pitch Po is B+G. Therefore, the reduction rate of the lead pitch P1 of the present invention with respect to the conventional pitch P is P1/P0=A+G/B+G. Here, if A = = 1.50°B = 2C, C = G, PI/P (1: hot summer 0.83), which means that the pitch is about 801 seconds compared to the conventional lead pitch. Therefore, For lead frames with the same number of leads, more reliable automatic bonding is possible, and for lead frames of the same size, a larger number of pins, that is, higher density mounting is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係るリードフレームのリー
ド先端部の部分平面図、第2図は従来のリードフレーム
の平面図である。 l・・・・・tタブ、2・・・・・・リード、3a・・
・・・・先端幅広リード、3b・・・・・・先端幅狭リ
ード、A・・・・・・基準幅、B・・・・・・幅広寸法
、C・・・・・・幅狭寸法、G・・・・・・間隙寸法O 第1図
FIG. 1 is a partial plan view of a lead tip of a lead frame according to an embodiment of the present invention, and FIG. 2 is a plan view of a conventional lead frame. l...T tab, 2...Lead, 3a...
...Wide lead at the tip, 3b...Narrow lead at the end, A...Standard width, B...Wide dimension, C...Narrow width dimension. , G... Gap dimension O Fig. 1

Claims (1)

【特許請求の範囲】[Claims]  半導体ペレットを載置固着するためのタブと、先端部
が前記タブの周囲を囲むように配置された多数のリード
とを有する半導体装置用リードフレームにおいて、前記
リードの先端部には幅広部と幅狭部とを有し、かつ、隣
り合うリード同志で前記幅広部と幅狭部は互いに入り込
んだ関係にあり、リード間の間隙がほぼ一定に保たれて
いることを特徴とする半導体装置用リードフレーム。
In a lead frame for a semiconductor device, the lead frame has a tab for placing and fixing a semiconductor pellet, and a number of leads arranged such that the tip end surrounds the tab, and the tip end of the lead has a wide part and a wide part. A lead for a semiconductor device, characterized in that the wide part and the narrow part of adjacent leads are in a mutually intersecting relationship, and the gap between the leads is kept almost constant. flame.
JP59212101A 1984-10-09 1984-10-09 Lead frame for semiconductor device Pending JPS6190452A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59212101A JPS6190452A (en) 1984-10-09 1984-10-09 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59212101A JPS6190452A (en) 1984-10-09 1984-10-09 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6190452A true JPS6190452A (en) 1986-05-08

Family

ID=16616896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59212101A Pending JPS6190452A (en) 1984-10-09 1984-10-09 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6190452A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63272062A (en) * 1987-04-30 1988-11-09 Mitsui Haitetsuku:Kk Lead frame
KR20030053970A (en) * 2001-12-24 2003-07-02 동부전자 주식회사 Lead frame of semiconductor package

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5324256B2 (en) * 1973-12-03 1978-07-19
JPS5840614U (en) * 1981-09-12 1983-03-17 三菱電機株式会社 Set screw device with fall prevention

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5324256B2 (en) * 1973-12-03 1978-07-19
JPS5840614U (en) * 1981-09-12 1983-03-17 三菱電機株式会社 Set screw device with fall prevention

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63272062A (en) * 1987-04-30 1988-11-09 Mitsui Haitetsuku:Kk Lead frame
KR20030053970A (en) * 2001-12-24 2003-07-02 동부전자 주식회사 Lead frame of semiconductor package

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