JPS6197844A - Integrated circuit - Google Patents

Abstract

PURPOSE:To enable the effective utilization of suspension leads by a method wherein NC terminals corresponding to the suspension leads of the IC with built-in EPROM incorporated in flat packages and the like by using the lead frame are used as power source terminals for EPROM write. CONSTITUTION:This invention is the IC with built-in writable read only memories assembled in a package by using the lead frame. In the IC having suspension leads which couple the outer frame of a lead frame with the package body during the process of package assembly, terminals corresponding to the suspension leads are used as power source terminals for writing the IC with built-in writable read only memories. In other words, the leads which couple the frame 1 with the package body sealed with plastic resin are only substrate leads 4 and 5 and a suspension lead 10.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a rewritable read-only memory (hereinafter referred to as EFROM), and particularly relates to a BFROM chip mounted on a lead frame and hardened with plastic resin. The present invention also relates to a write power supply terminal for an EPROM sealed in a so-called plastic package.

[Conventional technology]

There are two types of EFROM: ultraviolet-erasable EPROM and electrically erasable WEFROM, but both require a power source for writing in addition to a power source for reading when writing, and the writing power is usually not used when reading. It's unnecessary.

On the other hand, integrated circuit packages can be roughly divided into two types: ceramic type and plastic type, but since plastic type is cheaper, plastic type is mainly used for consumer integrated circuit packages. Widely used. Plastic packages also vary depending on the external shape, such as DIP type (Dual-1n-1ine, Pac
(kage), flat type, etc., but as a recent trend, flat types, which allow leads to be taken out in all four directions of the package, are becoming mainstream for integrated circuits with a large number of bins. is a plastic shaped flat e
The assembly process for the package will be briefly explained.

FIG. 2 is a schematic diagram showing a state in which a chip 7 is bonded to a lead frame using bonding wires 6. In this figure, for simplicity, it is assumed that the number of pins in the package is nine. A large portion of the lead frame is composed of a frame frame 1 and an island 2, which are connected by substrate leads 4 and 5. Leads other than substrate leads 4 and 5, such as 8, are arranged on the frame side.

FIG. 3 is a diagram showing the next step after the step shown in FIG. 2, and is a diagram showing encapsulation with plastic resin and lead cutting. In this figure, the lead frame is encapsulated with plastic resin, and the portion indicated by the dotted line in the figure is cut. It should be noted here that in this case, lead cutting is performed only on leads other than substrate leads 4 and 5 and suspension lead 10.

The reason why these three leads are left uncut is to prevent deformation of the leads when handling this package during integrated circuit testing, etc. performed in subsequent steps. Rather than separating it from the wire at all, it is connected with these three leads. By doing so, when handling the package, the worker can grasp the frame 1 and accomplish the purpose of the work.

FIG. 1 is an external view of the package after the dotted line portion in FIG. 8 is cut. As is clear from this figure, among the leads taken out from the package body 11, all of the leads except for the substrate, the board, and the suspension lead 10 are completely separated from the other leads. can test integrated circuits.

[Problem that the invention seeks to solve]

In the above situation, the suspension/lead is connected to the substrate/lead via the frame, so the substrate voltage is always applied. For this reason, the suspension lead is either used as the same substrate power supply terminal as the substrate lead, or is not used at all.
Either it is used as a terminal. Generally, it is sufficient to have 21 substrate power supply terminals, and 8 are often not required. Furthermore, it goes without saying that it is preferable not to have an NC terminal since it actually reduces the number of effective terminals of the package.

SUMMARY OF THE INVENTION Under such circumstances, it is an object of the present invention to provide a method for effectively utilizing the suspension leads that have conventionally been used as NC terminals.

Means for Solving Problem C] The present invention uses a lead frame to connect the NC terminal corresponding to the suspension/lead of an integrated circuit with a built-in EFROM built into a flat package etc. to an EP ROM write power supply terminal. By using it as an NC terminal, it is intended to make effective use of the hanger leads, which have conventionally been unused as NC terminals and have instead reduced the effective number of terminals of the package.

〔Example〕

FIG. 1 is an external view of the package after cutting the dotted line portion in FIG. 8 as described above. It shows that only the leads 4 and 5 and the hanging lead 10 are included.

In this state, the integrated circuit is tested, but the question remains: 1. How to conduct this test remains. As already mentioned, a voltage of the same potential as that of the substrate lead is applied to the suspension lead, but generally the write voltage of a BFROM is higher than the voltage of the substrate. Therefore, if the state shown in Figure 1 remains, the EPROM
It is not possible to perform a writing direct pressure test.

However, in recent years, as the cost of integrated circuits with built-in EPROMs has decreased, even EFROMs with UV-erasable type have been replaced with FP-EPROMs (Factor) without erasing windows.
The demand for y-Programmad, EPROM) has been increasing. This FP-BPROM is a conventional E
While PFLOM erases or writes data and programs on the user side, it is characterized in that the erase/write work is done on the factory side, and the present invention utilizes this property to erase or write data and programs. This is an attempt to solve the problems of

Here, when the above-mentioned FP-EPROM is adopted as the EPROM, the user's data or program is written at a test stage generally called [probe test (Provθtest) J] before the integrated circuit is assembled. At this stage, the bonding pad 8 on the chip corresponding to the "hanging pin" is attached to the substrate.
Leads 4 and 5 are not matched. Therefore, at this stage, it is possible to apply a write test voltage higher than the reading substrate voltage to the suspension/lead. Also, FP-EFROM
Since there is no need to rewrite the contents on the user side, after the assembly process, only the test to read the contents of the BFROM is required. Therefore, the terminal corresponding to the suspension/lead, that is, the write power supply terminal, is connected to the substrate terminal. There is no problem even if you do.

Furthermore, even when the present invention is applied to conventional EFROMs other than FP-EPROMs, as long as the probe test has been sufficiently conducted, it is often sufficient to perform only a read test after the assembly process. In some cases, it is also possible to assemble integrated circuits using conventional EFROMs.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to effectively utilize the lead of a flat package integrated circuit containing a built-in FP-EFROM, which was previously wasted as an NC terminal. In the circuit,
Extremely effective.

[Brief explanation of drawings]

FIG. 1 shows a plastic-encapsulated EPROM according to the present invention.
A plan view of a built-in flat package type integrated circuit - Figure 2 is a plan view showing the process of mounting and bonding a chip on a lead frame in the integrated circuit of Figure 1;
The figure shows the parts where the leads are cut after sealing with plastic resin. 1...Frame frame, 2...Island, 8...Leads other than substrate leads, 4.5
...substrate lead, 6...bonding wire, 7...chip, 8...bonding butt, ]0...suspension lead, 11...package body.

Claims (1)

[Scope of Claim] An integrated circuit incorporating a writable read-only memory that is assembled into a package using a lead frame, wherein the outer frame of the lead frame and the package body are separated during the assembly process of the package. Join"
The integrated circuit has a "hanging/lead", wherein a terminal corresponding to the "hanging/lead" is used as a write power supply terminal of the integrated circuit incorporating the writable read-only memory.