JPS62101053A - 薄型電子回路ユニツト - Google Patents

薄型電子回路ユニツト

Info

Publication number
JPS62101053A
JPS62101053A JP60241159A JP24115985A JPS62101053A JP S62101053 A JPS62101053 A JP S62101053A JP 60241159 A JP60241159 A JP 60241159A JP 24115985 A JP24115985 A JP 24115985A JP S62101053 A JPS62101053 A JP S62101053A
Authority
JP
Japan
Prior art keywords
sealing resin
chip
wiring substrate
substrate
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60241159A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0410743B2 (de
Inventor
Yoshitaka Fukuoka
義孝 福岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60241159A priority Critical patent/JPS62101053A/ja
Publication of JPS62101053A publication Critical patent/JPS62101053A/ja
Publication of JPH0410743B2 publication Critical patent/JPH0410743B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP60241159A 1985-10-28 1985-10-28 薄型電子回路ユニツト Granted JPS62101053A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60241159A JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60241159A JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Publications (2)

Publication Number Publication Date
JPS62101053A true JPS62101053A (ja) 1987-05-11
JPH0410743B2 JPH0410743B2 (de) 1992-02-26

Family

ID=17070137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60241159A Granted JPS62101053A (ja) 1985-10-28 1985-10-28 薄型電子回路ユニツト

Country Status (1)

Country Link
JP (1) JPS62101053A (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999028969A1 (en) * 1997-12-03 1999-06-10 Advanced Micro Devices, Inc. Integrated circuit chip package and method of making the same
JP2008153601A (ja) * 2006-12-20 2008-07-03 Fujitsu Ltd 実装構造及び半導体装置
JP2017204494A (ja) * 2016-05-09 2017-11-16 オリンパス株式会社 医療機器用電子基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182854A (ja) * 1982-04-21 1983-10-25 Hitachi Ltd レジン封止型半導体装置およびその製造方法
JPS5988853A (ja) * 1982-11-12 1984-05-22 Nec Corp Ｌｓｉパツケ−ジ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58182854A (ja) * 1982-04-21 1983-10-25 Hitachi Ltd レジン封止型半導体装置およびその製造方法
JPS5988853A (ja) * 1982-11-12 1984-05-22 Nec Corp Ｌｓｉパツケ−ジ

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999028969A1 (en) * 1997-12-03 1999-06-10 Advanced Micro Devices, Inc. Integrated circuit chip package and method of making the same
US6124546A (en) * 1997-12-03 2000-09-26 Advanced Micro Devices, Inc. Integrated circuit chip package and method of making the same
JP2008153601A (ja) * 2006-12-20 2008-07-03 Fujitsu Ltd 実装構造及び半導体装置
JP2017204494A (ja) * 2016-05-09 2017-11-16 オリンパス株式会社 医療機器用電子基板

Also Published As

Publication number Publication date
JPH0410743B2 (de) 1992-02-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term