JPS6214941B2 - - Google Patents

Info

Publication number
JPS6214941B2
JPS6214941B2 JP54078485A JP7848579A JPS6214941B2 JP S6214941 B2 JPS6214941 B2 JP S6214941B2 JP 54078485 A JP54078485 A JP 54078485A JP 7848579 A JP7848579 A JP 7848579A JP S6214941 B2 JPS6214941 B2 JP S6214941B2
Authority
JP
Japan
Prior art keywords
oxide film
phosphorus
forming
glass layer
vapor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54078485A
Other languages
Japanese (ja)
Other versions
JPS562638A (en
Inventor
Seiichiro Takabayashi
Masanori Sakata
Yoshiaki Yadoiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7848579A priority Critical patent/JPS562638A/en
Publication of JPS562638A publication Critical patent/JPS562638A/en
Publication of JPS6214941B2 publication Critical patent/JPS6214941B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法にかかり、とく
に耐湿性を向上したリンガラス層を有する半導体
装置の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a phosphor glass layer with improved moisture resistance.

半導体装置特に半導体集積回路装置では、微細
化が進み、それに伴い金属配線層の幅も著しく細
くなつて来ている。さらに多層配線化が進み、金
属配線が横切る下層に非常に大きな段差が出来る
のが普通で断線の原因となつている。この段差を
なくすために通常高濃度のリンを含んだリンガラ
ス層を金属配線下に形成しリンガラスの流動性を
利用し段部を滑らかにし断線を防いでいる。
2. Description of the Related Art Semiconductor devices, particularly semiconductor integrated circuit devices, are becoming increasingly finer, and the width of metal wiring layers is also becoming significantly narrower. Furthermore, as multi-layer wiring progresses, it is common for very large steps to form in the lower layers where metal wiring crosses, causing wire breaks. To eliminate this level difference, a phosphorus glass layer containing a high concentration of phosphorus is usually formed under the metal wiring, and the fluidity of phosphorus glass is utilized to smooth the step and prevent wire breakage.

しかしながらこの方法の欠点として耐湿性に弱
い点がある。リンガラスは吸水性があり、さらに
水と反応しリン酸となりこれが高温高湿状態では
金属配線を侵食し、断線を起こさせるのである。
特に素子をプラスチツクパツケージに組み込んだ
場合には、プラスチツクパツケージは防水性がセ
ラミツク、カンケース等に比べ格段に劣るため、
長時間高温高湿の雰囲気中にさらされると容易に
水分が素子表面にまで達し、素子のリンガラス層
と反応し、リン酸が生成し、金属配線の腐食が起
こる。このため、リンガラス層を含んだ素子のプ
ラスチツクパツケージ品の耐湿性を推持するのが
非常に困難なものとされていた。
However, a drawback of this method is that it has poor moisture resistance. Phosphorus glass has water absorption properties, and reacts with water to form phosphoric acid, which corrodes metal wiring under high temperature and high humidity conditions, causing wire breakage.
Especially when the device is assembled into a plastic package, the waterproofness of the plastic package is much lower than that of ceramics, can cases, etc.
When exposed to a high-temperature, high-humidity atmosphere for a long period of time, moisture easily reaches the surface of the element, reacts with the phosphorous glass layer of the element, produces phosphoric acid, and corrodes the metal wiring. For this reason, it has been extremely difficult to maintain the moisture resistance of a plastic package of an element containing a phosphor glass layer.

近来、この種の素子の耐湿性を上げるためプラ
ズマ窒化膜で素子表面をパツシベーシヨンする方
法が取られる様になつた。たしかにこの窒化膜の
耐湿性への効果は非常に大きなものであるが、一
つ大きな欠点がある。それは、プラズマ窒化膜の
成長時に素子にダメージを与え、リーク電流を増
加させることである。そのためリーク電流にきび
しい品種(例えば半導体メモリー)では歩留低下
の原因となつている。
Recently, in order to improve the moisture resistance of this type of device, a method has been adopted in which the surface of the device is passivated with a plasma nitride film. It is true that this nitride film has a very large effect on moisture resistance, but it has one major drawback. This causes damage to the device during the growth of the plasma nitride film and increases leakage current. This causes a decrease in yield in products that are sensitive to leakage current (eg, semiconductor memories).

本発明はこの様に素子の特性をそこねることな
しに、耐湿性を向上させることを可能とするもの
である。
The present invention thus makes it possible to improve moisture resistance without impairing the characteristics of the element.

本発明は、半導体素子上に形成された高濃度の
リンガラス層の上に、リン(P2O5)を1〜7モル
%ドープした気相成長酸化膜を0.2〜1.5μの厚さ
に形成し、このリンドープ酸化膜を熱処理して、
緻密化し、高濃度のリンガラス層と金属配線(例
えばアルミニウム配線)を直接接触させない様に
したことを特徴とする。
The present invention involves forming a vapor-phase grown oxide film doped with 1 to 7 mol% of phosphorus (P 2 O 5 ) to a thickness of 0.2 to 1.5 μm on a highly concentrated phosphorus glass layer formed on a semiconductor element. This phosphorus-doped oxide film is then heat-treated.
It is characterized in that it is densified and the high-concentration phosphorus glass layer and metal wiring (for example, aluminum wiring) are not brought into direct contact with each other.

リンドープ気相成長酸化膜によつて、外部から
のリンガラス層への水の浸入を止めて、リン酸の
溶け出しによる金属配線の腐食を防止するのであ
る。ここで、用いる気相成長酸化膜は、成長後
は、ポーラスで透水性があるため、そのままでは
使用出来ないのであるが本発明の様に、リン
(P2O5)の適量のドープと熱処理により熱酸化膜
に近い緻密な膜が得られ、防水効果を有する様に
なる。
The phosphorus-doped vapor-phase grown oxide film prevents water from entering the phosphorus glass layer from the outside and prevents corrosion of the metal wiring due to leaching of phosphoric acid. The vapor-grown oxide film used here is porous and water-permeable after growth, so it cannot be used as it is, but as in the present invention, it is doped with an appropriate amount of phosphorus (P 2 O 5 ) and heat-treated. As a result, a dense film similar to a thermal oxide film can be obtained, which has a waterproof effect.

次に第1図に本発明をN−チヤンネルシリコン
ゲートMOS、LSIに適用した実施例を示す。ま
ず、フイールド部の酸化膜2、ゲート酸化膜3、
およびポリシリコンのゲート電極4が形成されて
いる(第1図a)。次いでリン拡散し、ソース・
ドレイン領域5を形成した後、0.5μmの高濃度
のリンガラス層6を気相成長により形成する(第
1図b)。次にリンガラス層6にコンタクトの穴
をあけた後に、リン(P2O5)を4モル%ドープし
た気相成長酸化膜7を約0.5μm成長させた、次
いで高温(900〜1000℃)で熱処理して該酸化膜
を緻密化させた(第1図c)。次に再びコンタク
トの穴をあけた後、アルミ蒸着し、パターニング
して配線8を形成し、最後にカバーとしてボンデ
イングパツド部以外は気相成長膜9で被服する
(第1図d)。
Next, FIG. 1 shows an embodiment in which the present invention is applied to an N-channel silicon gate MOS and LSI. First, the oxide film 2 in the field part, the gate oxide film 3,
and a polysilicon gate electrode 4 (FIG. 1a). Phosphorus then diffuses into the source
After forming the drain region 5, a highly concentrated phosphorus glass layer 6 of 0.5 μm is formed by vapor phase growth (FIG. 1b). Next, after making a contact hole in the phosphorus glass layer 6, a vapor phase growth oxide film 7 doped with 4 mol% of phosphorus (P 2 O 5 ) was grown to a thickness of about 0.5 μm, and then heated to a high temperature (900 to 1000°C). The oxide film was densified by heat treatment (FIG. 1c). Next, after drilling a contact hole again, aluminum is deposited and patterned to form a wiring 8, and finally, as a cover, the area other than the bonding pad is covered with a vapor-phase grown film 9 (FIG. 1d).

尚、リンをドープした気相成長膜の熱処理は他
の高温の熱工程で代用することも可能である。こ
の様にして作られた試料をプラスチツクケースに
組み込み、高圧下で高温高湿の寿命試験を行つた
ところ、対策していない試料の3倍以上の寿命を
示し、本発明の効果が如実に表われた。第2図に
気相成長酸化膜に、ドープしたリン(P2O5)の濃
度と高圧下での高温高湿の寿命試験を行つた時の
寿命時間の関係をリンをドープしない場合の寿命
時間を基準に取りその倍率によつて示した。これ
によるとドープするリンの濃度を1〜7モル%に
すると効果が得られることがわかる。
Note that the heat treatment of the phosphorus-doped vapor-phase grown film can be replaced by other high-temperature heat processes. When the sample made in this way was assembled into a plastic case and subjected to a life test under high pressure and high temperature and humidity, it showed a lifespan more than three times that of the sample without any countermeasures, clearly demonstrating the effectiveness of the present invention. I was disappointed. Figure 2 shows the relationship between the concentration of phosphorus (P 2 O 5 ) doped into a vapor-phase grown oxide film and its life time when subjected to a high temperature, high humidity life test under high pressure. It is expressed as a magnification based on time. According to this, it can be seen that an effect can be obtained when the concentration of phosphorus to be doped is 1 to 7 mol%.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aから第1図dは本発明の一実施例を工
程順に示した断面図である。第2図は気相成長酸
化膜にドープしたリンのモル濃度と寿命時間の関
係を示す図である。 尚図において1……シリコン基板、2……酸化
膜、3……ゲート酸化膜、4……ポリシリコンの
ゲート電極、5……ソース・ドレイン拡散領域、
6……リンガラス層、7……リンドープ気相成長
酸化膜、8……アルミ配線、9……気相成長酸化
膜である。
FIGS. 1a to 1d are cross-sectional views showing an embodiment of the present invention in the order of steps. FIG. 2 is a diagram showing the relationship between the molar concentration of phosphorus doped into a vapor-phase grown oxide film and its lifetime. In the figure, 1... silicon substrate, 2... oxide film, 3... gate oxide film, 4... polysilicon gate electrode, 5... source/drain diffusion region,
6... Phosphorus glass layer, 7... Phosphorus-doped vapor phase grown oxide film, 8... Aluminum wiring, 9... Vapor phase grown oxide film.

Claims (1)

【特許請求の範囲】[Claims] 1 フイールド酸化膜、ゲート酸化膜、ゲート電
極が設けられている半導体基板にソース、ドレイ
ン領域を形成する工程と、しかる後に前記フイー
ルド酸化膜、ゲート電極、ソース、ドレイン領域
を高濃度のリンガラス層で被覆する工程と、前記
高濃度のリンガラス層に直接被着してP2O5を1
〜7モル%含み厚さが0.2μm〜1.5μmの酸化膜
を形成する工程と、熱処理に前記酸化膜を緻密化
させる工程と、前記酸化膜に直接被着して前記ソ
ース、ドレイン領域に接続せるアルミニウム配線
層を形成する工程と、全体を気相成長膜で被覆す
る工程とを有することを特徴とする半導体装置の
製造方法。
1. A step of forming source and drain regions on a semiconductor substrate provided with a field oxide film, a gate oxide film, and a gate electrode, and then forming the field oxide film, gate electrode, source, and drain regions with a highly concentrated phosphorus glass layer. P 2 O 5 is coated directly on the high concentration phosphorus glass layer to coat it with P 2 O 5.
A step of forming an oxide film with a thickness of 0.2 μm to 1.5 μm containing ~7 mol%, a step of densifying the oxide film by heat treatment, and directly depositing on the oxide film and connecting to the source and drain regions. 1. A method for manufacturing a semiconductor device, comprising the steps of: forming an aluminum wiring layer, and covering the entire surface with a vapor-phase growth film.
JP7848579A 1979-06-21 1979-06-21 Manufacture of semiconductor device Granted JPS562638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7848579A JPS562638A (en) 1979-06-21 1979-06-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7848579A JPS562638A (en) 1979-06-21 1979-06-21 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS562638A JPS562638A (en) 1981-01-12
JPS6214941B2 true JPS6214941B2 (en) 1987-04-04

Family

ID=13663279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7848579A Granted JPS562638A (en) 1979-06-21 1979-06-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS562638A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0691074B2 (en) * 1985-03-30 1994-11-14 ソニー株式会社 Semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348681A (en) * 1976-10-15 1978-05-02 Matsushita Electronics Corp Semiconductor device and its production

Also Published As

Publication number Publication date
JPS562638A (en) 1981-01-12

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