JPS62190896A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS62190896A
JPS62190896A JP3436586A JP3436586A JPS62190896A JP S62190896 A JPS62190896 A JP S62190896A JP 3436586 A JP3436586 A JP 3436586A JP 3436586 A JP3436586 A JP 3436586A JP S62190896 A JPS62190896 A JP S62190896A
Authority
JP
Japan
Prior art keywords
hole
holes
conductive layer
printed wiring
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3436586A
Other languages
Japanese (ja)
Inventor
修 平井
野口 節生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3436586A priority Critical patent/JPS62190896A/en
Publication of JPS62190896A publication Critical patent/JPS62190896A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔韮東上の利用分野〕 本発明は印刷配線板の製造方法に関し、特に、スルーホ
ールと非スルーホールの混在する印刷配線板の製造方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of Nitojou] The present invention relates to a method of manufacturing a printed wiring board, and more particularly to a method of manufacturing a printed wiring board having both through holes and non-through holes.

〔従来の技術〕[Conventional technology]

従来、上下両面間の導通のあるスルーホールと。 Conventionally, through holes have continuity between the upper and lower surfaces.

導通のない非スルーホールの混在する印刷配線板を製造
するには、まず第2自(a)に示す如く、表裏面に銅箔
2の接曾された印刷配線板(以後基板と称す)1に孔3
を穿設する0次に基板1の全面にめっきして4電層4ケ
被庸し、スルーホール38を形成する(第2凶(b) 
) o次いでスルーホール3a内に樹脂ペースト6を充
填し、硬化後、基板1の表面に付着しでいる樹脂ペース
ト6七除去した後、第2図(c)の如く基板10表面の
一部にエッチングレジスト層7奮被着形原する。次いで
第2図(d)の如く、エツチングレジスト層7をエツチ
ングマスクとして基板1の全面にエツチング除去なった
後、第2図(e)の如く、エツチングレジスト層7およ
び樹脂ペースト6ケ剥離除去し、所望の回路パターン4
&に形成する。次に第2図(f)の如く、非スルーホー
ル5akNC孔明は磯にエフ穿設する。次いで第2図@
の如く、ソルダーレジスト8全印刷、被着し、最後に外
形枠取ジ加工を施して、スルーホール3aと非スルーホ
ール5aとが混在する印刷配線板を得ていた。
In order to manufacture a printed wiring board with a mixture of non-through holes without conduction, first, as shown in Part 2 (a), a printed wiring board (hereinafter referred to as a board) 1 with copper foil 2 coated on the front and back surfaces is prepared. hole 3
Next, the entire surface of the substrate 1 is plated to cover four 4-conductor layers, and a through hole 38 is formed (second hole (b)).
) Next, the through holes 3a are filled with resin paste 6, and after curing, the resin paste 6 that has adhered to the surface of the substrate 1 is removed, and then a part of the surface of the substrate 10 is filled as shown in FIG. 2(c). The etching resist layer 7 is deposited and shaped. Next, as shown in FIG. 2(d), the entire surface of the substrate 1 is etched and removed using the etching resist layer 7 as an etching mask, and then the etching resist layer 7 and the resin paste 6 are peeled off and removed as shown in FIG. 2(e). , desired circuit pattern 4
Form into &. Next, as shown in FIG. 2(f), a non-through hole 5ak NC hole is drilled on the rocky shore. Next, Figure 2 @
As shown in the figure, the solder resist 8 was completely printed and adhered, and finally the outer frame was processed to obtain a printed wiring board in which through-holes 3a and non-through-holes 5a coexisted.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来の印刷配線板の製造方法では。 In such a conventional printed wiring board manufacturing method.

スルーホール3aと非スルーホール5aとに同時に穿孔
形放しょうとし′fc場曾、非スルーホール5aの孔壁
に導電層4が残ってしまうので、スルーホール3aの形
成後に非スルーホール5a′(I−別穿設している。こ
のため次の工うな欠点がめった。
If the through hole 3a and the non-through hole 5a were to be drilled at the same time, the conductive layer 4 would remain on the hole wall of the non-through hole 5a, so the non-through hole 5a' ( I-separate holes were made.This resulted in the following disadvantages.

(イ)近年印刷配線板へのIC,LSI、抵抗、コンデ
ン?尋谷a部品の実装には自動実装機が適用さnlその
適用比率も年々増加している。この場合、スルーホール
3aと非スルーホール5aとの相対位置精度は±50μ
m以内と高精度が要求されている。一方、スルーホール
3aと非スルーホール5aとを別穿孔によって形成した
場合、製造工程における基板1の伸縮、あるいにスルー
ホー ゛ル3aと非スルーホール5aのそれぞれの穿孔
時に使用する孔明は機の相対位置のずれ等により、スル
ーホール3aと非スルーホール5aとの相対孔位置精度
が悪くなる欠点があった。
(a) ICs, LSIs, resistors, and capacitors for printed wiring boards in recent years? Automatic mounting machines are used to mount parts, and the rate of their use is increasing year by year. In this case, the relative positional accuracy between the through hole 3a and the non-through hole 5a is ±50μ.
High accuracy is required, within m. On the other hand, when the through hole 3a and the non-through hole 5a are formed by separate drilling, the expansion and contraction of the substrate 1 during the manufacturing process and the drilling used when drilling the through hole 3a and the non-through hole 5a, respectively, are There is a drawback that the relative hole position accuracy between the through hole 3a and the non-through hole 5a deteriorates due to the relative positional deviation.

(ロ)また、通常孔3の穿孔時には、孔明は磯1軸当友
り基板1−2〜3枚重ねるところのいわゆる重ね孔明け
が行わnているが、非スルーホール5の穿孔時に重ね孔
明は全行なうと、スルーホール3aと非スルーホール5
aとの相対位置精度が著しく悪化するので重ね孔明けは
行なわず、通常1軸当たり1枚で穿孔している。このた
め作業効率が著しく悪くなり、また、当て板、バックア
ツプ材、ドリルといっ九孔明は作業に付随して用いる材
料のコストも高くな9%したがって安価な印刷配線板の
製造が困難であっ几〇 〔問題点全解決する之めの手段〕 上記問題点に対し本発明の製造方法は、表裏面に銅箔の
接合され几印刷配線基板にスルーホール用および非スル
ーホール用の孔勿同時に穿設する工程と、前記基板の全
面にめっきを施して孔の内壁面および銅箔面に導電層を
被着し、スルーホール全形成する工程と、前記スルーホ
ール内K[脂ペースト會充填し硬化させた後、基板の衷
心全面に樹脂マスクを被着形成する工程と、前記非スル
ーホール用の孔の中心の位置に非スルーホール用の孔工
9径の小さな表畏貫通孔七穿設した後1貫通孔内の樹脂
ペーストラ化学的に溶解除去する工程と、前記樹脂マス
ク?]?機械的に剥離する工程と、前記導電層の表面の
一部にエツチングレジスト層會形放する工程と、エツチ
ングレジスト層tエツチングマスクとして露出する尋′
電層會エツチングして回路パターンを形成すると共に、
非スルーホール用の孔内の4蒐層をエツチング除去する
工程と、前記樹脂ペーストおよびエツチングレジスト#
全除去する工程とから構成さnている。
(b) Also, when drilling the hole 3, normally, the so-called stacked drilling is performed, in which two to three boards 1-3 are stacked on each rock per shaft, but when drilling the non-through hole 5, the drilling is carried out in a stacked manner. When all is done, through hole 3a and non-through hole 5
Since the relative positional accuracy with a is significantly deteriorated, overlapping holes are not drilled, and one hole is normally drilled per axis. As a result, work efficiency is significantly reduced, and the cost of materials used in conjunction with the work, such as backing plates, back-up materials, and drills, is also high.9% Therefore, it is difficult to manufacture inexpensive printed wiring boards. Hand 〇 [A means of all problems solved] The manufacturing method of the present invention is a hole for through holes and non -through holes on the front and back of the present invention on the front and back. A step of forming a through hole by plating the entire surface of the board and depositing a conductive layer on the inner wall surface of the hole and a copper foil surface, and a step of filling the through hole with K [fat paste]. After curing, a step of forming a resin mask on the entire center of the board, and drilling seven small front through holes with a diameter of 9 for non-through holes at the center of the holes for non-through holes. After that, the resin paste in the through hole is chemically dissolved and removed, and the resin mask? ]? a step of mechanically peeling off, a step of forming an etching resist layer on a part of the surface of the conductive layer, and a step of forming an etching resist layer on a part of the surface of the conductive layer;
Along with etching the electrical layer to form a circuit pattern,
A step of etching and removing the four layers in the hole for a non-through hole, and the resin paste and etching resist #
It consists of a complete removal step.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図(a)〜(4を参照し
て説明する。
Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1(a) to (4).

まず、第1図(mlの如く%表裏両面に銅箔2の接合さ
nfC,f板lにスルーホール用の孔3および非スルー
ホール用の孔5’kNC孔明は機により同時に穿孔する
。次に第1図(b)の如く、基板1に無電解鋼めっきお
よび電解鋼めっきを施し、導電層4を被着して、孔3の
壁面にスルーホール3a’i形成する。次いで第1図(
C)の如く、スルーホール3aおよび非スルーホール用
の孔5内にアルカリ可溶の溶剤乾祿型の樹脂ベース)6
t−、例えばロールコータ−(図示省略)を用いて充項
し、温度1o。
First, as shown in Figure 1 (ml), the copper foil 2 is bonded to both the front and back surfaces of the nfC, f plate l, and the holes 3 for through holes and the holes 5'k for non-through holes are simultaneously drilled by a machine.Next Then, as shown in FIG. 1(b), electroless steel plating and electrolytic steel plating are applied to the substrate 1, a conductive layer 4 is applied, and a through hole 3a'i is formed on the wall of the hole 3.Next, as shown in FIG. (
As shown in C), an alkali-soluble solvent drying type resin base) 6 is placed in the through-hole 3a and the hole 5 for non-through-holes.
t-, using a roll coater (not shown), for example, at a temperature of 1o.

〜120℃で30〜60分間乾燥し硬化させる。(樹脂
ペースト6に紫外線硬化型のもの上用いる楊曾には、樹
脂ペースト6を内部まで硬化させるため。
Dry and cure at ~120°C for 30-60 minutes. (The resin paste 6 used is of ultraviolet curable type, in order to harden the resin paste 6 to the inside.

基板1の両面に1〜2 J/cm”の紫外[−照射して
硬化させる。)欠に第1図(d)の如く、基板10表表
裏面に樹脂マスク9t−W着する。樹脂マスクとしては
粘着テープ?用い、ラミネータ(図示省略)を使用して
基板1の両面に同時に熱圧着させなから被着する。次い
で第1図(e)の如く、孔5の位1直に孔5の孔径工9
0.1〜0.3酎小さな径でNC孔明は磯により、1軸
当たり基板2〜3枚重ねて穿孔して1表裏面七賞通した
孔5’に形成する。次に第1図(f)の如く、2〜4重
量−の水酸化ナトIJウム水溶液を、温度40〜50℃
で、30〜60秒基板1にスプレーして孔5′の孔壁に
付着している孔埋めイ/り6を溶解除去した後、第11
輸)の如く1表裏面の樹脂マスク9を剥離除去する。
Both sides of the substrate 1 are irradiated with ultraviolet light of 1 to 2 J/cm" and cured. Resin masks 9t-W are applied to the front and back surfaces of the substrate 10 as shown in FIG. 1(d). As shown in FIG. hole drilling 9
NC holes with a small diameter of 0.1 to 0.3 mm are formed by drilling 2 to 3 substrates per shaft in a stacked manner using a rock to form a hole 5' that passes seven holes through one front and back surface. Next, as shown in FIG.
Then, after spraying on the substrate 1 for 30 to 60 seconds to dissolve and remove the hole filler 6 attached to the hole wall of the hole 5', the 11th
Peel and remove the resin mask 9 on the front and back surfaces as shown in Figure 1).

次いで第1図(5)の如<、伸1めりきの導電層4上に
付着する樹脂ペースト6をパフにて研暦して除去した後
、第1図(1)の如く、スクリーン印刷法あるいはフォ
ト印刷法で導電層4の一部にエツチングレジスト層7を
形成する。次に第111(j)の如く。
Next, as shown in FIG. 1 (5), the resin paste 6 adhering to the stretched conductive layer 4 was removed by polishing with a puff, and then screen printing was performed as shown in FIG. 1 (1). Alternatively, the etching resist layer 7 is formed on a portion of the conductive layer 4 by a photoprinting method. Next, as in Section 111(j).

エツチングレジスト層7七エツチングマスクとして導電
層4の繕出部分全エツチング除去して所望の回路パター
ンを形成すると同時に孔5内壁の銅めっきの導電層4會
もエツチング除去して非スルーホール5a’、(形成す
る。次いで第1図(2)の如くエツチングレジスト層7
および樹脂ペースト6を温度40〜50℃、2〜4重量
−の水酸化ナトリクム水溶液で2〜4分スプレーして剥
離除去した後、第1図(4の如く、ソルダーレジスト8
を回路パターン上に印刷し、最後に所定の外形枠加工を
施して、非スルーホール5aとスルーホール3aとが混
在する印刷配線基板得た。
Etching resist layer 77 is used as an etching mask to completely remove the repaired portion of conductive layer 4 to form a desired circuit pattern, and at the same time, the copper-plated conductive layer 4 on the inner wall of hole 5 is also etched away to form non-through hole 5a'. (Formation. Next, as shown in FIG. 1 (2), an etching resist layer 7 is formed.
After peeling and removing the resin paste 6 by spraying it with a 2-4 weight sodium hydroxide aqueous solution at a temperature of 40-50°C for 2-4 minutes, the solder resist 8
was printed on the circuit pattern, and finally a predetermined outer frame was processed to obtain a printed wiring board in which non-through holes 5a and through holes 3a coexisted.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明に工nは1次の
効果がある。
As is clear from the above description, the present invention has a first-order effect.

(1)  スルーホールと非スルーホールとカ同時穿孔
にエリ形成できるため、両者の相対孔位W稍度が保証さ
n%部品の自動実装化に対応した印刷配線板が製造でき
る。
(1) Since it is possible to form an edge in simultaneous drilling of through holes, non-through holes, and holes, the relative hole position W consistency of both can be guaranteed, and a printed wiring board compatible with automatic mounting of n% components can be manufactured.

(it)  作業効率の同上および材料コストの低減が
計れ、安価な印刷配線板の製造ができる。
(IT) It is possible to improve work efficiency and reduce material costs, and to manufacture inexpensive printed wiring boards.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(tに本発明による印刷配線板の製造方
法の一実施例を工程順にd兄明する断面図である0第2
図(a)〜(―ハ従来の印刷配線板の製造方法を工程順
に説明する断面図である0 ]・・・・・・印刷配線基板、2・・・・・・銅箔% 
3・・・・・・(スルーホール用の)孔、3a・・・・
・・スルーホール、4・・・・・・導電層、5・・・・
・・(非スルーホール用の)孔、5a・・・・・・非ス
ルーホール、6・・・・・・w脂ペースト。 7・・・・・・エツチングレジスト層、8・・・・・・
ソルダーレジスト、9・・・・・・樹脂マスク。 梢l 図
FIGS. 1(a) to 1(t) are cross-sectional views illustrating an embodiment of the method for manufacturing a printed wiring board according to the present invention in the order of steps.
Figures (a) to (-c) are cross-sectional views illustrating a conventional printed wiring board manufacturing method step by step.
3...hole (for through hole), 3a...
...Through hole, 4...Conductive layer, 5...
...Hole (for non-through hole), 5a...Non through hole, 6...W fat paste. 7... Etching resist layer, 8...
Solder resist, 9...resin mask. treetop diagram

Claims (1)

【特許請求の範囲】[Claims]  表裏両面に銅箔の接合された基板にスルーホール用お
よび非スルーホール用の孔を同時に穿設する工程と、前
記基板の全面にめっきを施して孔の内壁面および銅箔面
に導電層を形成する工程と、前記内壁面に導電層を形成
した孔内に樹脂ペーストを充填し硬化させた後、基板の
表裏全面に樹脂マスクを被着形成する工程と、前記非ス
ルーホール用の孔の中心の位置に非スルーホール用の孔
より径の小さな表裏貫通孔を穿設した後、貫通孔内の樹
脂ペーストを化学的に溶解除去する工程と、前記樹脂マ
スクを機械的に剥離する工程と、前記導電層の表面の一
部にエッチングレジスト層を形成する工程と、このエッ
チングレジスト層をエッチングマスクとして露出する導
電層をエッチングして回路パターンを形成すると共に非
スルーホール用の孔内の導電層をエッチング除去する工
程と、前記樹脂ペーストおよびエッチングレジスト層を
除去する工程とを含むことを特徴とする印刷配線板の製
造方法。
A process of simultaneously drilling holes for through holes and non-through holes on a board with copper foil bonded on both the front and back sides, and plating the entire surface of the board to form a conductive layer on the inner wall surface of the hole and the copper foil surface. a step of filling a resin paste into the hole in which a conductive layer is formed on the inner wall surface and curing it, and then a step of forming a resin mask on the entire front and back surfaces of the substrate; After drilling a front and back through hole with a smaller diameter than a hole for a non-through hole at the center position, a step of chemically dissolving and removing the resin paste in the through hole, and a step of mechanically peeling off the resin mask. , a step of forming an etching resist layer on a part of the surface of the conductive layer, and using this etching resist layer as an etching mask, etching the exposed conductive layer to form a circuit pattern, and also forming a conductive layer in the hole for a non-through hole. A method for manufacturing a printed wiring board, comprising the steps of etching away the layer and removing the resin paste and the etching resist layer.
JP3436586A 1986-02-18 1986-02-18 Manufacture of printed wiring board Pending JPS62190896A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3436586A JPS62190896A (en) 1986-02-18 1986-02-18 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3436586A JPS62190896A (en) 1986-02-18 1986-02-18 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPS62190896A true JPS62190896A (en) 1987-08-21

Family

ID=12412139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3436586A Pending JPS62190896A (en) 1986-02-18 1986-02-18 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS62190896A (en)

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