JPS62252575A - Digital data recording/playback device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital data recording and reproducing device.

Conventional technology Examples of conventional digital data recording and reproducing devices include:
An example is an NRZ type magnetic recording/reproducing device in which random numbers are generated using the V sequence. A block diagram of this conventional recording apparatus is shown in FIG. In the figure, 41 is an input terminal for parallel data, 42 is an input terminal for a clock with a frequency equal to the recording bit rate (hereinafter referred to as a bit clock), and 43 is a serially converted data and M series divided by 2 for each bit. 44 is a circuit for converting parallel data into serial data with n bits as one word; 46 is a circuit for converting parallel data into serial data;
A random number generator generates random numbers bit by bit in synchronization with the pit clock, 46 is a recording circuit, and 47 is a recording head.

The n-bit parallel data input to the input terminal 41 is applied to the parallel-to-serial converter 44 and converted into serial data in units of 1 pit. It is added to the random number sequence and recorded using the NRZ method through the recording circuit 46 and recording head 47.

At this time, the random number generator 46 is generally constituted by a linear feedback shift register circuit, and the random number sequence generated by the random number generator 46 is M
This is a series called a series.

FIG. 5 shows an example of a random number generation circuit that generates an M sequence when the number n of pits constituting one word is 4 and H(x)=x'+x+1 is used as the primitive polynomial. 6 in the same figure
1 is a pit clock input terminal 62 to 66 are D flip-flops, 66 is a Kx-OR gate, and 67 is a serial output terminal. In synchronization with the pit clock, the values of flip-flops 53-66 are each shifted one place to the right, and the value of flip-flop 52 becomes the value fed back by Ex-OR gate 66. Therefore, if the initial values of each flip-flop are set to 0.0, 0.1 from the right side, the series obtained at the output terminal 57 in synchronization with the pit clock thereafter will be 0.0, 0, 1.0, . 0,1.1.0,1.0,1.1
．． 1 + 1;'', which is an M sequence with a period of 16.

Further, the adder 43 modulo 2 of this conventional example has one E
It is composed of a z-OR gate.

As described above, in this conventional recording apparatus, since the random number generator 46 and the adder 43 operate in synchronization with the pit clock, it is necessary to configure the circuit using high-speed elements.

Next, the block diagram of the playback device in this conventional example is shown in the sixth section.
As shown in the figure. In the figure, 61 is a playback head, 62 is a playback circuit, 63 is a serial-to-parallel converter, 64 is a modulo-2 adder, e
5 is a random number generator, and 66 is a parallel output terminal for reproduced data.

The signal reproduced by the reproduction head 61 is transmitted to the reproduction circuit 62.
Clock recovery, binarization, bit synchronization, and word synchronization are performed, and the signals are serially applied to an adder 64. On the other hand, the reproduction circuit 6
The random number generator 66, which operates in synchronization with the pit clock reproduced in step 2, generates the same M sequence as at the time of recording according to the reproduced address information, and sends this to the adder 64. In the adder 64, the reproduced data and the M sequence are added modulo 2 for each pit, and on the recording side,
The same data as the data before randomization is obtained. This data is sent to a serial/parallel converter 63, and reproduced data with n bits as one word is obtained at a terminal 66.

Therefore, in this conventional example, even in the playback device, the random number generator 66 and the adder 64 must operate in synchronization with the playback pit clock. It is necessary to use high-speed elements such as

Problems to be Solved by the Invention In the above configuration, when the recording bit rate increases, the circuits 33 and 34 that operate in synchronization with the pit clock
．． 35 requires circuits that operate at high speed, and the elements constituting these circuits also require high-speed elements such as ECL. This high-speed element is generally expensive and consumes a large amount of power.

Therefore, the above configuration has disadvantages in that the device is expensive and consumes a large amount of power.

In view of the above, an object of the present invention is to provide a digital data recording and reproducing apparatus that can record and reproduce randomized digital data at a high bit rate using low-speed elements.

Means to Solve the Problem The present invention includes a random number generator that generates random number data in units of words, and a circuit that adds the random number data generated by the random number generator and the data word in parallel. The present invention is a digital data recording and reproducing apparatus characterized in that data words converted into random numbers are parallel-serial converted and recorded and reproduced.

According to the present invention, during recording, by adding random number data generated in parallel to a data word before performing parallel-to-serial conversion, the adder and the random number generator add 1/n of the frequency of the pit clock ( It suffices to operate in synchronization with a clock (hereinafter referred to as word clock) having a frequency of (n is the number of bits constituting one word), and does not require high-speed elements as in the conventional example.

Furthermore, during playback, by adding random number data generated in parallel to the playback data word after serial-to-parallel conversion, it is possible to use low-speed elements in the same way as during recording. Accordingly, recording and reproduction at a higher recording bit rate than in the conventional example can be realized using slower elements.

Embodiment Below, as an embodiment of the present invention, an example of a magnetic recording and reproducing apparatus for digital data, such as a digital VTR, will be described.

FIG. 1 is a block diagram of the recording apparatus in this embodiment. In the figure, 11 is an input terminal for parallel data, 12 is an input terminal for word clock, 13 is a random number generator that generates random numbers in units of 1 word in synchronization with the word clock, and 14 is generated by random number generator 13. 15 is a parallel-to-serial converter that converts the randomized data word into serial data of one bit at a time; 16 is a recording circuit; and 17 is a recording head.

The parallel data input to the input terminal 11 is sent to the random number generator 1.
After the random numbers generated in parallel by 3 and the adder 14 are added in parallel and converted into random numbers, the parallel to serial converter 16
The data is converted into serial data and recorded through a recording circuit 16 and a recording head 17.

Here, the number n of bits constituting one word is assumed to be 4, and a circuit that generates a signal sequence similar to the conventional example as a random number sequence will be taken as an example of a random number generator.

FIG. 2 is a circuit diagram showing an example of a random number generator that generates the aforementioned M sequence in synchronization with a word clock in this embodiment. In the figure, 21o is a word clock input terminal, 21 to 24 are D-flip-flops, and 25 to 29 are IE! OR gates 211-214 are parallel output terminals. In this circuit, 4-bit flip-flop 2
Outputs from 1 to 24! ! - Feedback is fed back to each flip-flop 21-24 through a feedback circuit consisting of OR gates 2g-29, and in synchronization with the word clock supplied from terminal 210, an M sequence of 4 bits as one word is fed back to terminals 211-24. Obtained at 214. Similar to the conventional example described above, the initial values of each of the 7 lip-flops are set to 0.0, 0.1 from the top.
Then, the sequence obtained at the output terminal in synchronization with the word clock is, and the M sequence, which is the same as the conventional example described above, is 4.
It is obtained in bit-by-bit format. The modulo-2 adder 14 is also obtained by adding the random number and each corresponding bit of the data word using four Ex-OR gates. By configuring the random number generator 13 and the adder 14 in this way, the random number generator 13 and the adder 14
The elements that make up the.

This allows the use of slower devices that operate on a word clock that has a frequency that is one-fourth of the bit clock frequency.

Next, FIG. 3 shows a block diagram of the reproducing apparatus in this embodiment. In the figure, 31 is a playback head, 32 is a playback circuit,
33 is a serial/parallel converter, 34 is a parallel adder, 35 is a parallel random number generator, and 36 is an output terminal. The signal reproduced by the reproduction head 31 is subjected to clock reproduction, binarization, bit synchronization, and word synchronization by the reproduction circuit 32, and then is converted into a data word that is converted into a random number every n bits by the serial/parallel converter 33. Become. On the other hand, the random number generator 36 generates random numbers n bits in parallel in accordance with the reproduced address information. These randomized data words and the random number are added by the parallel adder 34, and the original data word before being randomized is obtained at the terminal 36.In this way, the reproducing circuit also uses a random number generator. Since adder 36 and adder 34 operate in synchronization with the word clock, they can be configured using low-speed elements.

In this embodiment, the recording and reproducing device is a magnetic recording and reproducing device, but it does not necessarily have to be a magnetic medium. Further, although the word length n is 4 bits in this embodiment, it is not limited to this, and may be arbitrary, such as 8 bits per word, for example.

As described in detail, according to the present invention, in a high bit rate recording/reproducing device, it is possible to increase the number of circuit parts configured using low-speed elements and reduce the number of circuit parts configured using high-speed elements. It becomes possible to realize recording and reproduction at a bit rate using a low-speed element. Furthermore, since high-speed elements are not used, it is possible to reduce the cost and power consumption of the device.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital data recording device in an embodiment of the present invention, FIG. 2 is a circuit diagram showing an example of a random number generator in the above embodiment, and FIG. 3 is a block diagram of a digital data recording device in an embodiment of the present invention. FIG. 4 is a block diagram of a conventional digital data recording device, FIG. 5 is a circuit diagram showing an example of the random number generator in the conventional example, and FIG. 6 is a block diagram of a conventional digital data recording device. FIG. 1 is a block diagram of a digital data reproducing device. 14...Parallel adder, 13...Random number generator in word units, 21-24...D-flip 70 tubes, 26-29...T ! , x-OR gate, 34...Parallel adder, 36...
Random number generator in word units, 43... Serial adder, 46... Random number generator in bit units, 62-6
6...D-7 Lip 70 Tsubu, 56...
・E! -OR gate. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 5

Claims (1)

[Claims] A digital data recording/reproducing device comprising a random number generator that generates random numbers in parallel in units of words, and an adder that adds the random numbers generated by the random number generator and data words in parallel.