JPS6236896A - Manufacturing method for single-sided through-hole wiring board - Google Patents
Manufacturing method for single-sided through-hole wiring boardInfo
- Publication number
- JPS6236896A JPS6236896A JP17653985A JP17653985A JPS6236896A JP S6236896 A JPS6236896 A JP S6236896A JP 17653985 A JP17653985 A JP 17653985A JP 17653985 A JP17653985 A JP 17653985A JP S6236896 A JPS6236896 A JP S6236896A
- Authority
- JP
- Japan
- Prior art keywords
- catalyst
- sided
- wiring board
- hole
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000003054 catalyst Substances 0.000 claims description 36
- 238000007747 plating Methods 0.000 claims description 16
- 238000007772 electroless plating Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 7
- 238000005553 drilling Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 16
- 229910052802 copper Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 15
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000005476 soldering Methods 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 230000003197 catalytic effect Effects 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 238000001556 precipitation Methods 0.000 description 2
- TXUICONDJPYNPY-UHFFFAOYSA-N (1,10,13-trimethyl-3-oxo-4,5,6,7,8,9,11,12,14,15,16,17-dodecahydrocyclopenta[a]phenanthren-17-yl) heptanoate Chemical compound C1CC2CC(=O)C=C(C)C2(C)C2C1C1CCC(OC(=O)CCCCCC)C1(C)CC2 TXUICONDJPYNPY-UHFFFAOYSA-N 0.000 description 1
- 101100136092 Drosophila melanogaster peng gene Proteins 0.000 description 1
- XEKOWRVHYACXOJ-UHFFFAOYSA-N Ethyl acetate Chemical class CCOC(C)=O XEKOWRVHYACXOJ-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical group O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910021626 Tin(II) chloride Inorganic materials 0.000 description 1
- 150000001242 acetic acid derivatives Chemical class 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 150000003842 bromide salts Chemical class 0.000 description 1
- 150000001805 chlorine compounds Chemical class 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 235000019439 ethyl acetate Nutrition 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 150000004673 fluoride salts Chemical class 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- FDWREHZXQUYJFJ-UHFFFAOYSA-M gold monochloride Chemical compound [Cl-].[Au+] FDWREHZXQUYJFJ-UHFFFAOYSA-M 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- CLSUSRZJUQMOHH-UHFFFAOYSA-L platinum dichloride Chemical compound Cl[Pt]Cl CLSUSRZJUQMOHH-UHFFFAOYSA-L 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000000275 quality assurance Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- 239000010948 rhodium Substances 0.000 description 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 1
- -1 salt salts Chemical class 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000009987 spinning Methods 0.000 description 1
- 235000011150 stannous chloride Nutrition 0.000 description 1
- 239000001119 stannous chloride Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Landscapes
- Chemically Coating (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、片面スルーホール配線板の製造法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for manufacturing a single-sided through-hole wiring board.
(従来の技術)
民生用電子機器のラヂオ、TV、VTRなどに主として
使用される片面プリント配線板は、片面の銅張積層板を
便用し、その銅箔をエツチングして所要のパターンを形
成するとともに、パンチングによって部品取付用の部品
リード勝挿入穴(スルーホール)および外形全加工して
作成する。そのIうにして作成した配線板に、電子部品
を取り付けた一例を第2図に示した。(Prior art) Single-sided printed wiring boards, which are mainly used in consumer electronic devices such as radios, TVs, and VTRs, use a single-sided copper-clad laminate, and the copper foil is etched to form the desired pattern. At the same time, the parts lead insertion holes (through-holes) for mounting parts and the entire external shape are created by punching. FIG. 2 shows an example in which electronic components are attached to a wiring board prepared in this manner.
第2図に於て、21は絶縁層、22は回路パターン、2
3はバット、24はスルーホール、25は電子部品、2
6は半田である。電子部品25は、そのリード線を配線
板の部品面ニジ穴(スルーホール)24に通し、半1」
」ディップ面のバット25とリード線を半円部げに1っ
て取付けらnる。In FIG. 2, 21 is an insulating layer, 22 is a circuit pattern, 2
3 is a bat, 24 is a through hole, 25 is an electronic component, 2
6 is solder. For the electronic component 25, pass the lead wire through the through hole 24 on the component surface of the wiring board,
Attach the butt 25 on the dip surface and the lead wire to the semicircular part.
この片面プリント配紡ツルでは、電子部品25はリード
M’にバット25部分のみで半田付けすることにより固
定するものであるため、半田付信頼性に問題が残る。半
田付信頼性に優れるものとして、第5図に示すような片
面スルーホール配線板がある。In this single-sided print spinning vine, since the electronic component 25 is fixed to the lead M' by soldering only the butt 25 portion, there remains a problem in soldering reliability. A single-sided through-hole wiring board as shown in FIG. 5 has excellent soldering reliability.
片面スルーホール配線板は、穴(スルーホール)34内
壁に銅y〕つきが施さ扛ておシ、そtにより電子部品3
5は、そのリード線が半田34揚げによってバット65
のみでなく、穴内にも半田34が充填さ扛、強固に増り
付けらγしる。The single-sided through-hole wiring board has a copper plate on the inner wall of the hole (through-hole) 34, which allows electronic components 3 to be attached.
5, the lead wire is attached to the bat 65 by soldering 34.
Not only that, but also the solder 34 is filled in the hole and firmly attached.
したがって半田付信頼性が一段と向上し、品質保証上非
常に好ましい。第5図に於て、51はPR層、62は回
路パターンである。Therefore, soldering reliability is further improved, which is very desirable in terms of quality assurance. In FIG. 5, 51 is a PR layer and 62 is a circuit pattern.
特に撮動の激しい状態で使用する場合には片面スルーホ
ール配線板の効果か強く表わfる。Particularly when the camera is used under intense shooting conditions, the effect of the single-sided through-hole wiring board becomes more apparent.
例えば自動車搭載用電子機器には多く採用されるいる。For example, it is widely used in electronic devices installed in automobiles.
この片面スルーホール配線板をフルアディティブ法で製
造する場合、通常第4図、第5図に示す方法にIすiA
造される。When manufacturing this single-sided through-hole wiring board by a fully additive method, the method shown in FIGS. 4 and 5 is usually used.
will be built.
第4図に於て、接着剤41付積JfI扱42を使用し囚
、平面回路が形成されない接着剤が付けられていない面
を触媒処理すると無電、解めっきが析出するので触媒が
耐着しないためのレジスト43を印刷する(B)。その
後入44あげ(C)、触媒45処理(D)、レジスト4
3剥#(E)、めっきレジスト46形成(F)、無11
解めっき47(Eを行って片面スルーホール配線板を製
造する。In Figure 4, if adhesive 41 is used and JfI treated 42 is used, but if a plane circuit is not formed and the surface to which no adhesive is applied is treated with a catalyst, electroplating will precipitate and the catalyst will not adhere. Print a resist 43 for printing (B). After that, add 44 (C), catalyst 45 treatment (D), resist 4
3 stripping # (E), plating resist 46 formed (F), no 11
Perform deplating 47 (E) to manufacture a single-sided through-hole wiring board.
第5図の場合は、触媒入り接着剤51付の触媒入り積層
板52を使用する(A)。この場合も、平面回路が形成
さtない接着剤が付けられていない面に無電解めっきが
析出しないようにレジスト53全印刷する(Bl。その
後、穴54あけ(C)、めっきレジスト55形成fD)
、無電解めっき56(E)、レジスト53剥離fF)を
行って片面スルーホール配線板を製造する。In the case of FIG. 5, a catalyst-containing laminate plate 52 with a catalyst-containing adhesive 51 is used (A). In this case as well, the entire resist 53 is printed to prevent electroless plating from depositing on the surface where no planar circuit is formed and no adhesive is attached (Bl. After that, the holes 54 are drilled (C), and the plating resist 55 is formed fD )
, electroless plating 56 (E), and resist 53 peeling fF) to produce a single-sided through-hole wiring board.
(発明が解決しようとする間粕点)
しかしながら、第4図、第5図に示す方法では、それぞ
n、触媒処理にエリ基板に触媒が耐着しないためのレジ
スト45、無電解めっきが基板に析出しないためのレジ
スト55を形成する工程が必要となり、工程数が多くな
る。(The problem to be solved by the invention) However, in the methods shown in FIGS. 4 and 5, resist 45 is used to prevent the catalyst from adhering to the substrate during catalyst treatment, and electroless plating is applied to the substrate. A step of forming a resist 55 to prevent precipitation is required, which increases the number of steps.
本発明は、製造工程が短縮され、^密度配線パターンの
形成に通ずる片面スルーホール配線板の製造法を提供す
るものである。The present invention provides a method for manufacturing a single-sided through-hole wiring board that shortens the manufacturing process and facilitates the formation of a high-density wiring pattern.
(間粕点を解決するための手段) 第1図によp本発明を説明する。(Means for solving the problem) The present invention will be explained with reference to FIG.
第1図(4)は、絶縁基板である接着剤付槓層板を示す
もので、触媒入り絶縁ノー11と非触媒絶縁1−12の
2Nより形成されているものである。FIG. 1(4) shows an adhesive laminated plate which is an insulating substrate, and is made of 2N of catalyst-containing insulation 11 and non-catalytic insulation 1-12.
触媒入り絶縁層は、絶縁層内に触媒が入っており、無電
解めっきに際して触媒処理をする必要がなく、銅は析出
する。In the catalyst-containing insulating layer, a catalyst is contained in the insulating layer, and there is no need for catalyst treatment during electroless plating, and copper is deposited.
すなわち、触媒入り絶縁板に明けらnだ穴内壁の表面に
は、触媒が一様に分布しているので、無電解銅めっき浴
に浸漬すれば、穴内壁表面には無電解の銅が析出する。In other words, the catalyst is uniformly distributed on the surface of the inner wall of the n-shaped hole drilled in the catalyst-containing insulating plate, so when immersed in an electroless copper plating bath, electroless copper is deposited on the inner wall surface of the hole. do.
しかし一般の絶縁層(非触媒絶縁層)には、触媒が入っ
ていないので、その層の部分には全く銅が析出しない。However, since a general insulating layer (non-catalytic insulating layer) does not contain a catalyst, no copper is deposited in that layer.
触媒としては、元素周期律表の第■族および第1B族に
梱する金属、たとえば、ニッケル、金、銀、プラチナ、
パラジウム、ロジウム、銅、イリジウム等、又はこrら
の酸化物、塩化物、臭化物、弗化物、エチルアセテート
、フルオロボレート、硝酸基、敬酸塩、アセテート等を
挙げることができる。特に有用なのは、パラジウム、金
、プラチナ、銅、塩化パラジウム、塩化金、塩化プラチ
ナ、酸化鋼またはこれらと塩化第1錫を組合せたもので
ある。こnらの触媒をA71203 8t02系の担体
に吸着させ、又、エポキシ樹脂に混付したものを熱硬化
性樹脂ワニス中に分散させ、これをガラスクロス、紙等
の基拐に含浸、乾燥させ触媒入りプリプレグを作る。As a catalyst, metals included in Group Ⅰ and Group 1B of the Periodic Table of Elements, such as nickel, gold, silver, platinum,
Examples include palladium, rhodium, copper, iridium, etc., or their oxides, chlorides, bromides, fluorides, ethyl acetates, fluoroborates, nitric acid groups, salt salts, acetates, and the like. Particularly useful are palladium, gold, platinum, copper, palladium chloride, gold chloride, platinum chloride, oxidized steel or their combinations with stannous chloride. These catalysts are adsorbed onto an A71203 8t02 carrier, mixed with epoxy resin, dispersed in thermosetting resin varnish, impregnated into a substrate such as glass cloth or paper, and dried. Make prepreg containing catalyst.
又触媒全混入しないで触媒なしのプリプレグを作る。触
媒入りプリプレグの必要枚数重ね合せた一力の面に触媒
なしのプリプレグの必要枚数を重ね合せ全体を加熱加圧
一体化して積層板を製造し、触媒なしのプリプレグの反
対面に触媒入り接着剤層を形成する。Also, prepreg without catalyst can be made without mixing the catalyst at all. Required number of sheets of prepreg with catalyst Lay the required number of sheets of prepreg without catalyst on one side of the stack, heat and pressurize the whole to make a laminate, and apply catalyst-containing adhesive on the opposite side of the prepreg without catalyst. form a layer.
このような、無t′!Nぬっき触媒の混入した積層板と
、無電解めっき触媒の混入した接着剤層との触媒入り絶
縁層11と、S電解めっき触媒の混入しない所定厚みの
積層板等の触媒なし絶縁層12とで構成されるP、縁基
板全使用して(N、所定の箇所に穴15を明け、回路パ
ターンとなる部分以外の箇所に永久レジストであるめっ
きレジスト14を形成する。Like this, no t'! A catalyst-containing insulating layer 11 consisting of a laminate containing an N plating catalyst and an adhesive layer containing an electroless plating catalyst, and a catalyst-free insulating layer 12 such as a laminate of a predetermined thickness that does not contain a S electrolytic plating catalyst. Using the entire edge substrate (N), holes 15 are bored at predetermined locations, and a plating resist 14, which is a permanent resist, is formed at locations other than the portions that will become circuit patterns.
その永久レジストインクの表面には、無電解めっき浴に
浸漬しても無電解銅が析出しない耐めっき性のインクで
ある。又その永久レジストインクは、無電解ぬっき液の
中に長時間浸漬(−でも溶解などによりめつき液を汚染
しないものである。The permanent resist ink is a plating-resistant ink that does not deposit electroless copper on the surface even when immersed in an electroless plating bath. Furthermore, the permanent resist ink does not contaminate the plating solution due to dissolution even if it is immersed in the electroless plating solution for a long time.
永久レジストインクの印部1jされた配線板全無電解め
っき浴に浸漬すると、触媒入り絶縁層の表向(穴の内壁
表面)のみに銅15が析出し、その他の永久レジストイ
ンクの表面および触媒の入っていない絶縁層表面(非触
媒絶縁層)には銅が析出しない。したがって所要の部分
のみに銅めっき17が施され、片面スルーホール配線板
をうろことができる。When the wiring board marked with the permanent resist ink 1j is immersed in an electroless plating bath, copper 15 is deposited only on the surface of the catalyst-containing insulating layer (the inner wall surface of the hole), and the other permanent resist ink surfaces and the catalyst are immersed in the electroless plating bath. Copper does not precipitate on the surface of the insulating layer that does not contain (non-catalytic insulating layer). Therefore, the copper plating 17 is applied only to the required portions, and can be applied to the single-sided through-hole wiring board.
以上、穴あけ(BJ後めっきレジスト形成fQO場@全
示したが、めっきレジスト形成(C)後、穴あけfB)
、を行っても良い。又接着剤/i#は必ずしもなくても
良い。Above, drilling (after BJ plating resist formation fQO field @ fully shown, after plating resist formation (C), drilling fB)
, you may do so. Further, the adhesive /i# may not necessarily be used.
(発明の効果)
本発明の方法では、触媒入り層−非触媒層から成り立っ
ている絶縁基板全使用し、所要の穴内壁部分のみ圧熱電
解銅めっきを析出させるものであるため、簡単な工程で
片面スルーホール配線板を製造することが出来る。(Effects of the Invention) In the method of the present invention, the entire insulating substrate consisting of a catalyst-containing layer and a non-catalyst layer is used, and piezothermal electrolytic copper plating is deposited only on the inner wall of the required hole, so the process is simple. It is possible to manufacture single-sided through-hole wiring boards using this method.
又、非触媒絶縁層の厚さT1に変えることにより穴内壁
の無電解めっき欽の析出する茜さT2(触媒入り層の厚
みに相当する)全任意に選定できる。銅の析出高さT2
を任意に変えられることは、従来の方法では全く不可
能である。従来の方法では部品面(パターンのない面)
の穴出口にも銅めっきが引出して、穴の出口にもり上が
る。その影響も加わって非常に接近した穴の場合には、
半田揚げによって半田が穴から突出し、隣の穴と半田に
よるブリッナを発生する。Further, by changing the thickness T1 of the non-catalytic insulating layer, the depth T2 (corresponding to the thickness of the catalyst-containing layer) of the deposited electroless plating layer on the inner wall of the hole can be arbitrarily selected. Copper precipitation height T2
It is completely impossible with conventional methods to change the value arbitrarily. In the conventional method, the component side (the side without a pattern)
The copper plating also pulls out from the hole exit and rises to the hole exit. In addition to this effect, in the case of holes that are very close together,
Due to solder frying, the solder protrudes from the hole and generates blister due to the solder and the adjacent hole.
本発明では接近した穴であっても牛用上りが少ないので
、半田によりブリッジが発生しない。In the present invention, even if the holes are close to each other, there are few uphill steps, so no bridging occurs due to solder.
穴内壁に施すめ きの高さT2は、一般的に−ユl−x
1oo%=20〜50%が適当である。The height T2 of the plating on the inner wall of the hole is generally -Yl-x
1oo%=20-50% is appropriate.
T I+ T 2T I+ T 2
第1図は本発明の方法金示す断面図、第2図、第5図は
配線板の断面図、第4図、第5図は従来の方法を示す断
面図である。
符号の説明
11、触媒入り絶縁層
12、触媒なし絶縁層
私大
14、めっきレジスト
15、析出銅
V、鵬 1−
第5図FIG. 1 is a sectional view showing the method of the present invention, FIGS. 2 and 5 are sectional views of a wiring board, and FIGS. 4 and 5 are sectional views showing the conventional method. Explanation of symbols 11, insulating layer with catalyst 12, insulating layer without catalyst private university 14, plating resist 15, deposited copper V, Peng 1- Fig. 5
Claims (1)
た無電解めっき触媒の入っていない絶縁層とで構成され
る絶縁基板を、穴あけ、めっきレジスト形成後、又はめ
っきレジスト形成、穴あけ後、無電解めっきを行うこと
を特徴とする片面スルーホール配線板の製造法。1. After drilling and forming a plating resist on an insulating substrate consisting of an insulating layer containing an electroless plating catalyst and an insulating layer not containing an electroless plating catalyst formed on one surface thereof, or after forming a plating resist and drilling, A method for manufacturing a single-sided through-hole wiring board characterized by performing electroless plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17653985A JPS6236896A (en) | 1985-08-10 | 1985-08-10 | Manufacturing method for single-sided through-hole wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17653985A JPS6236896A (en) | 1985-08-10 | 1985-08-10 | Manufacturing method for single-sided through-hole wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6236896A true JPS6236896A (en) | 1987-02-17 |
Family
ID=16015363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17653985A Pending JPS6236896A (en) | 1985-08-10 | 1985-08-10 | Manufacturing method for single-sided through-hole wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6236896A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04232278A (en) * | 1990-11-13 | 1992-08-20 | Internatl Business Mach Corp <Ibm> | Conditioning of substrate for electroless plating onto substrate |
-
1985
- 1985-08-10 JP JP17653985A patent/JPS6236896A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04232278A (en) * | 1990-11-13 | 1992-08-20 | Internatl Business Mach Corp <Ibm> | Conditioning of substrate for electroless plating onto substrate |
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