JPS6239916A - Pll circuit - Google Patents

Abstract

PURPOSE:To stably apply PLL synchronization even at a pitch control operation by providing a free run frequency changeover circuit to a control voltage input side of a voltage controlled oscillator. CONSTITUTION:A switch 8 command a prescribed pitch change externally. In turning ON the switch for 10 times, a control circuit 7 increases +10% pitch by a program. In keeping the depression, the pitch is decreased up to -10%. The control circuit 7 receiving a command of the external command switch 8 outputs a control signal 9 so as to turn ON analog electronic switches 5', 6'. A VCO2 is decided by a voltage Ve given by resistors R1, R2, R3, R4 when the free run frequency f0 sets the pitch to + or -0%. The lock range of the PLL is acted largely by the setting of the free run frequency f0. The analog electronic switch 5' is changed over so as to attain the free run frequency most suited to the pitch while using the control signal to select R5, R6...Rn thereby varying the Ve.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a phase-locked loop (hereinafter referred to as PLL) that follows changes in the phase of an input signal.

[Conventional technology and its problems]

As for conventional PLL circuits, the circuit shown in FIG. 2 is common.

In the figure, 1 is an input signal, 2 is a voltage controlled oscillator (hereinafter referred to as V
3 is a phase comparator, and 4 is a loop filter. The input signal 1 and the output voltage of the VCO 2 are input to the phase comparator 3, and the phase comparator 3 outputs a voltage corresponding to the phase difference between the respective phases. The output of the phase comparator 3 is passed through a loop filter 4 to a control voltage for the VCO 2 that makes the phase difference zero. As a result, the loop follows changes in the phase of the input signal 1. conventional PC
In the circle L for extracting M recorder data, a frequency range of approximately ±5% of the input signal (based on the VCO output frequency) is the possible limit as a lock range.

Therefore, when the tape speed of a running system such as a tape recorder is varied by about ±10% as an external instruction, the frequency of the input signal is naturally varied by 110%. Therefore, if the conventional method is used, Pl and l will be unlocked and cannot be used for pitch control of a tape recorder or the like.

[Means for solving problems]

When using circles and L to extract data and clock from a recording/playback device, regardless of whether it is PCM or analog, the basic method of using the device is to change the running speed of the tape to determine the pitch (music interval) of the signal. The time may be changed arbitrarily. If this is done with a PCM (11K recording/playback device), the PLL synchronization of data and clocks may not follow stably because the signal frequency (clock interval) is varied.Such pitch control operations It is an object of the present invention to provide a PLL circuit that can stably perform PLL synchronization even in the following cases.

That is, a voltage controlled oscillator whose frequency changes depending on the control voltage, a phase comparator that outputs a phase error voltage between the human input signal and the output signal of the voltage controlled oscillator, and a control voltage of the voltage controlled oscillator from the output of this phase comparator. In the PLL circuit, a free-run frequency switching circuit capable of arbitrarily changing the free-run frequency of the voltage-controlled oscillator is provided on the control voltage input side of the voltage-controlled oscillator. A control circuit for controlling the free-run frequency switching circuit and an external command switch for determining a control signal to be given from the control circuit to the free-run frequency switching circuit are provided, The configuration is such that the PLL operation is performed stably according to commands.

Furthermore, in addition to the above, a time constant switching circuit is provided for making the time constant of the loop filter variable by a control signal from the control circuit.

[For production]

As described above, by providing a free-run frequency control circuit, a time constant switching circuit, a control circuit for controlling these circuits, and an external command switch, it is possible to follow a wide range of frequencies.

〔Example〕

FIG. 1 is a circuit diagram of a PLL circuit according to the present invention.

1 is an input signal, 2 is a phase comparator for vCO 13, 4 is a loop filter, 5 is a free-run frequency switching circuit, 6 is a time constant switching circuit, and analog electronic switches 5' and 6, respectively.
' to switch. 7 is a control circuit, and 8 is an external command switch for sending a pitch command.

First, a predetermined pinch change is instructed from the outside using switch 8. For example, if the switch is turned on 10 times, the control circuit 7 is programmed to raise the pitch by +10%. If you keep pressing the button further, the pitch will be lowered by -10% (this method can be freely selected depending on each system).

The control circuit 7 receiving the command from the external command switch 8 outputs a control signal 9 so that the analog electronic switches 5' and 6' are turned on at a predetermined value. VCO2
is originally determined by the voltage v8 given by the resistance value RI+I+2+R1+R4 when the free run frequency f0 and pitch are set to ±0%. This free run frequency f. The lock range of P[, L is greatly affected by the setting of .

Therefore, by using the control signal 9, the analog electronic switch 5' is switched so that the free run frequency is most suitable for the pinch, and R, R6...R9
Select and vary Ve. However, since the loop gain of the system changes due to the variable pitch, if more rounded stability is desired, an analog electronic switch 6' may be installed to obtain the optimum loop filter time constant according to the control signal 9. By doing so, it is possible to sufficiently follow even a large variable range. Normally, the pitch step of pitch control is very small, about 0.2 to 0.3%, and the total variable range is wide, about ±10%, so analog electronic switches 5' and 6' are used for each step. I can't afford to switch. Therefore, it is sufficient to roughly switch within the range in which the PLL is stably locked. In other words, if the number of steps is 128, it can be expressed with 7 bits. Therefore, by assigning the upper 3 bits to the control signal 9 and making the analog electronic switches 5' and 6' into 3-8 decoders, it is possible to determine the free run frequency in 8 stages of 16 steps each out of 128 steps. Also, 16 stepsop is 3 to 5 in a pinch.
%, so it will never go out of lock range at each step.

〔Effect of the invention〕

As described above, since the control circuit switches over a wide range of lock ranges to the optimum step, the lock range is not deviated at each step.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a PLL circuit according to the present invention, and FIG. 2 is a circuit diagram of a conventional circle circuit. 1... Input signal, 2... Voltage controlled oscillator (VCO), 3... Phase comparator, 4...
...Loop filter, 5...Free run frequency switching circuit, 6...Time constant switching circuit, 7...
...Control circuit, 8...External command switch, 9.
...Control signal.

Claims (2)

[Claims] (1) A voltage controlled oscillator whose frequency changes depending on the control voltage; a phase comparator that outputs a phase error voltage between the input signal and the output signal of the voltage controlled oscillator; In a PLL circuit equipped with a loop filter for obtaining a control voltage, a free-run frequency switching circuit capable of arbitrarily changing the free-run frequency of the voltage-controlled oscillator is provided on the control voltage input side of the voltage-controlled oscillator. , a control circuit for controlling this free-run frequency switching circuit, and an external command switch for determining a control signal to be given from this control circuit to the free-run frequency switching circuit, and a control circuit for controlling the frequency change of the input signal. A PLL circuit characterized in that the PLL circuit is configured to stably perform a PLL operation according to the external command. (2) a voltage controlled oscillator whose frequency changes depending on the control voltage; a phase comparator that outputs a phase error voltage between the input signal and the output signal of the voltage controlled oscillator; In a PLL circuit equipped with a loop filter for obtaining a control voltage, a free-run frequency switching circuit capable of arbitrarily changing the free-run frequency of the voltage-controlled oscillator is provided on the control voltage input side of the voltage-controlled oscillator. , a control circuit for controlling the free-run frequency switching circuit; an external command switch for determining a control signal to be applied from the control circuit to the free-run frequency switching circuit; and a control circuit for controlling the time constant of the loop filter. 1. A PLL circuit, comprising: a time constant switching circuit which is made variable by a control signal from the input signal; and a PLL circuit configured to stably perform a PLL operation in accordance with the external command with respect to frequency changes of the input signal.