JPS624140U - - Google Patents

Info

Publication number
JPS624140U
JPS624140U JP1985092945U JP9294585U JPS624140U JP S624140 U JPS624140 U JP S624140U JP 1985092945 U JP1985092945 U JP 1985092945U JP 9294585 U JP9294585 U JP 9294585U JP S624140 U JPS624140 U JP S624140U
Authority
JP
Japan
Prior art keywords
circuit board
circuit
cooling
pillar
protect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985092945U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985092945U priority Critical patent/JPS624140U/ja
Publication of JPS624140U publication Critical patent/JPS624140U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/877Bump connectors and die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Description

【図面の簡単な説明】
第1図は本考案の一実施例のモジユールの断面
図である。 1……回路基板、2……LSI、3……封止冷
却部、4……はんだ、5……側壁、6……支柱、
7……はんだ。

Claims (1)

    【実用新案登録請求の範囲】
  1. 電子部品を搭載した回路基板と回路を保護する
    ための気密封止と冷却機構を兼ねた封止部とより
    成るモジユールにおいて、回路基板上に冷却部と
    接する柱を設けたことを特徴とするモジユールの
    構造。
JP1985092945U 1985-06-21 1985-06-21 Pending JPS624140U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985092945U JPS624140U (ja) 1985-06-21 1985-06-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985092945U JPS624140U (ja) 1985-06-21 1985-06-21

Publications (1)

Publication Number Publication Date
JPS624140U true JPS624140U (ja) 1987-01-12

Family

ID=30650187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985092945U Pending JPS624140U (ja) 1985-06-21 1985-06-21

Country Status (1)

Country Link
JP (1) JPS624140U (ja)

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