JPS6288431A - Analog-digital converter - Google Patents

Abstract

PURPOSE:To obtain a serial digital data by a single A/D converter only by providing a series conversion section comprising an A/D conversion section and a common control circuit in one chip of the A/D converter. CONSTITUTION:The A/D conversion section 4 consists of an analog multiplexer 14, a sample-and-hold circuit 12, a resistor ladder circuit 13, a voltage comparator 14 and a sequential comparator circuit 15. A serial conversion section 3 comprises a common control circuit 16, a data buffer 17, a transmission buffer 18 and a transmit control circuit 19. Then the A/D conversion section 4 and the serial conversion section 3 are moduled in one chip to constitute the A/D converter.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an A/1) converter, and in particular to an A/1] converter constructed from 1 chips.

[Conventional technology]

[e's A/l) converter is a data buffer.

l. Transmission control circuit w1. A serial converter consisting of a common control circuit with a microcomputer interface bus is modularized into one chip.
) There was no converter, and only the A/l) converter was made into a chip, making it an fcA/1) converter.

(The problem that Qming tries to solve) For this reason, the above-mentioned L2, the conventional A/D:
The following drawbacks are shown below.

1 A single A/l) converter alone cannot generate serial digital data from analog data.

2. In order to generate a 4-ta 1j digital data system from analog data, it is necessary to create and connect an external control circuit, which interferes with the high-quality pipes and makes it impossible to collect analog data at low cost.

3. A single A/I converter does not have an interface that matches the microcomputer interface bus, so it is not possible to connect to the microcomputer.

[Another way to calculate the time interval]

The A/l) converter of the present invention) has an A/D converter, a data buffer, a transmit buffer, a transmit control circuit, and a common control circuit having a microcomputer interface bus in the A/l) converter chip. It is constructed by providing a serial conversion section to
IIru.

〔Example〕

Next, the implementation of the present invention will be explained with reference to one drawing.

FIG. 1 is a block diagram of an A/l) conversion system including an A/I) converter including an A/I) converter having an A/I) converter section for implementing the present invention. 642 FIG. 1 is a detailed block diagram of an A/1) converter OIP with a serial conversion section shown in FIG.

#pJ1Figure 1 7''<S1)/A Conversion System No. 1) A conversion system including an data collection device 1, an analog device 2, and a converter X.

The A/D converter X#'i includes an A/D converter X#'i serial converter 3 and an A/D converter 4.

The A/D converter 4 and the direct converter 3 are comprised of a circuit fC shown in FIG.

That is, the A/l) conversion unit 4 includes an analog multiplexer 14, a sample holding circuit 12, and a resistance ladder circuit 1.
3, a voltage ratio softener 14, and a successive approximation circuit 15.

Further, the direct/IJ converter 3 includes a common control circuit 16, a data buffer 17, a transmit buffer 18, a transmit ItI141i411OJ path 19, and a circuit.

A/l) of the A/D converter X shown in FIG. 1C is supplied with the reference voltage 7 from the data acquisition device 1.

When collecting analog data from the data collection device kl or the analog carp 2, the data collection device 1 is transferred from the data collection device 1 to the 1u column conversion section 3 at the conversion tag display (a number 9). A/D conversion is performed from the serial converter 3 to the A/l) converter 4.
3 is 12, analog data I from analog system 2 (
1 is converted into parallel digital data 8 by an A/D converter 4. The parallel gage data 8 is sent to the direct converter 3, and the 16-column converter 3 automatically converts it to the serial digital gator 5 and sends the J11 data amplification value 1.\\.

Next, the operations of the single/1) converter 4 and autotary converter 3 will be described.

The reference voltage 7 from the data storage module ill is the resistance ladder circuit 1
3 and is compared with corrected analog data 24 from the successive approximation circuit 15.

From the data collection device MI, A/l)
If there is a converter, the common control circuit 16 detects the converter 7]
The analog data 20 is supplied as gamma analog data 21 to the voltage comparator 14&C via the sample holding circuit 12.
The L6° voltage comparator 14 compares the red, upper and lower voltages 13 with the reference voltage 22, and sends the analog data 23 that has been softened to the successive approximation circuit 15.

The analog data 23 sent to the successive ratio llR1!2 circuit 15 is converted to the conversion instruction No. 16 9. of the common control circuit 16. It is converted into parallel digital data 8 by a clock signal 26, stored in a data buffer 17, and sent to a transmit buffer 18 as parallel digital data 29.

The parallel digital data 29 sent to the transmit buffer 18 is transmitted to the control circuit 6 [41 signal 27 . controlled by a control signal 28;
It is converted into serial digital data 5 and sent to the data acquisition device fi.
Send to ll.

〔Effect of the invention〕 Person of the present invention/1) The converter is an A/D conversion section.

By modularizing a data buffer, a transmit buffer, a common control circuit having a transmit control circuit ν and a microcomputer interface bus into a single chip, the following effects can be obtained.

1. Only a single A/D converter is required to generate digital signals from analog data.

2. Even when generating parallel digital data from analog data, it is possible to produce analog data with high efficiency and low cost.

3. Even when connected to a microcomputer, since it has an interface that connects to the microcomputer interface, it is easy to connect the sieve and summer parts, and it is possible to connect Ck at low cost.

[Brief explanation of drawings]

Figure 1 is a block diagram of an A/l) conversion system including an embodiment of the present invention, Figure 2 is a detailed block diagram of an embodiment of the rotor. /D converter, l... Data acquisition device IL, 2... Analog device [, 3...
...Serial conversion section, 4...A/D conversion section,
5...μ column digital data, 6...
Conversion instruction number, 7-... & quasi (, pressure, 8... mountain parallel digital data, 9... conversion loss signal,
10...- Analog data, 11... Analog multiplexer, 12...° Sample holding circuit, 13... Resistance ladder circuit, 14...
...Voltage comparator, 15... Successive approximation circuit, 16
......Common control 1! l! Circuit, 17...
Data buffer, 18... Transmit buffer, 19... Transmit control circuit, 20
...Analog data, 21...Analog data, 22...Reference voltage, 23...
・Analog data, 24--Correction ゛Analog data, 26--Clock signal, 27...
・Control signal, 28... Control (Q-No., 29...
...Parallel digital data.

Claims (1)

[Claims] A common A/D conversion section consisting of an analog multiplexer, sample hold circuit, resistance ladder circuit, voltage comparator, and successive approximation circuit, and a data buffer, transmit buffer, transmit control circuit, and microcomputer interface bus. An A/D converter characterized in that a serial converter comprising a control circuit is included in one chip.