JPS63101876U - - Google Patents

Info

Publication number
JPS63101876U
JPS63101876U JP19646986U JP19646986U JPS63101876U JP S63101876 U JPS63101876 U JP S63101876U JP 19646986 U JP19646986 U JP 19646986U JP 19646986 U JP19646986 U JP 19646986U JP S63101876 U JPS63101876 U JP S63101876U
Authority
JP
Japan
Prior art keywords
noise detection
pattern
printed board
detection pattern
detection signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19646986U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19646986U priority Critical patent/JPS63101876U/ja
Publication of JPS63101876U publication Critical patent/JPS63101876U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す構成図である。 第1図において、1はプリント板、3はデータ
バス、4はノイズ検出用パターン、R,R
それぞれ抵抗、5はレシーバ回路である。
FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, 1 is a printed board, 3 is a data bus, 4 is a noise detection pattern, R 1 and R 2 are resistors, and 5 is a receiver circuit.

Claims (1)

【実用新案登録請求の範囲】 プリント板1において、ノイズ検出対象のパタ
ーン3に平行にノイズ検出用パターン4を設け、 該ノイズ検出用パターン4には、該ノイズ検出
用パターン4の電圧及び出力インピーダンスを決
定するための2つの抵抗R,Rと、ノイズ検
出信号を発信するレシーバ回路5とを接続したこ
とを特徴とするプリント板。
[Claims for Utility Model Registration] In the printed board 1, a noise detection pattern 4 is provided in parallel to the noise detection target pattern 3, and the noise detection pattern 4 has a voltage and an output impedance of the noise detection pattern 4. A printed board characterized in that two resistors R 1 and R 2 for determining the noise detection signal are connected to a receiver circuit 5 for transmitting a noise detection signal.
JP19646986U 1986-12-20 1986-12-20 Pending JPS63101876U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19646986U JPS63101876U (en) 1986-12-20 1986-12-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19646986U JPS63101876U (en) 1986-12-20 1986-12-20

Publications (1)

Publication Number Publication Date
JPS63101876U true JPS63101876U (en) 1988-07-02

Family

ID=31155319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19646986U Pending JPS63101876U (en) 1986-12-20 1986-12-20

Country Status (1)

Country Link
JP (1) JPS63101876U (en)

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