JPS6310558U - - Google Patents
Info
- Publication number
- JPS6310558U JPS6310558U JP10484186U JP10484186U JPS6310558U JP S6310558 U JPS6310558 U JP S6310558U JP 10484186 U JP10484186 U JP 10484186U JP 10484186 U JP10484186 U JP 10484186U JP S6310558 U JPS6310558 U JP S6310558U
- Authority
- JP
- Japan
- Prior art keywords
- support member
- base
- lead
- lead support
- glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011521 glass Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は、本考案の一実施例に係るサーデイツ
プ型半導体装置用パツケージの構成図である。第
２図は、従来技術に係るサーデイツプ型半導体装
置用パツケージの構成図である。
１……ベース、１１……ベースの縁部、１２…
…ベースの凹部、２……リード、３……ガラス、
４……キヤツプ、５……ガラス、６……ボンデイ
ングワイヤ、７……半導体チツプ、８……リード
支持部材、８１……メタライズパターン。
FIG. 1 is a configuration diagram of a package for a deep dip type semiconductor device according to an embodiment of the present invention. FIG. 2 is a configuration diagram of a package for a radial dip type semiconductor device according to the prior art. 1... base, 11... edge of base, 12...
...Concave part of the base, 2...Lead, 3...Glass,
4... Cap, 5... Glass, 6... Bonding wire, 7... Semiconductor chip, 8... Lead support member, 81... Metallized pattern.
Claims (1)
れ、上面にはリード２が、メタライズパターン８
１を介して、溶着されている中抜き板状部材より
なる、リード支持部材８と、 該リード支持部材８の上面にガラスをもつて接
着されるセラミツク板状部材よりなるキヤツプ４
と を具備してなる半導体装置用パツケージ。[Claims for Utility Model Registration] A base 1 made of a box-shaped ceramic member, a glass bonded to the edge 11 of the base 1, a lead 2 on the top surface, and a metallized pattern 8.
1, a lead support member 8 made of a hollow plate-like member is welded to the top surface of the lead support member 8, and a cap 4 made of a ceramic plate-like member bonded with glass to the upper surface of the lead support member 8.
A semiconductor device package comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10484186U JPS6310558U (en) | 1986-07-08 | 1986-07-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10484186U JPS6310558U (en) | 1986-07-08 | 1986-07-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6310558U true JPS6310558U (en) | 1988-01-23 |
Family
ID=30978708
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10484186U Pending JPS6310558U (en) | 1986-07-08 | 1986-07-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6310558U (en) |
-
1986
- 1986-07-08 JP JP10484186U patent/JPS6310558U/ja active Pending