JPS6311742Y2 - - Google Patents
Info
- Publication number
- JPS6311742Y2 JPS6311742Y2 JP1981092723U JP9272381U JPS6311742Y2 JP S6311742 Y2 JPS6311742 Y2 JP S6311742Y2 JP 1981092723 U JP1981092723 U JP 1981092723U JP 9272381 U JP9272381 U JP 9272381U JP S6311742 Y2 JPS6311742 Y2 JP S6311742Y2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- pellets
- inner peripheral
- peripheral edge
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981092723U JPS6311742Y2 (2) | 1981-06-22 | 1981-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981092723U JPS6311742Y2 (2) | 1981-06-22 | 1981-06-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57203562U JPS57203562U (2) | 1982-12-24 |
| JPS6311742Y2 true JPS6311742Y2 (2) | 1988-04-05 |
Family
ID=29887738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981092723U Expired JPS6311742Y2 (2) | 1981-06-22 | 1981-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6311742Y2 (2) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5324780A (en) * | 1976-08-20 | 1978-03-07 | Hitachi Ltd | Lead frame |
| JPS5399962U (2) * | 1977-01-14 | 1978-08-12 | ||
| JPS5426359U (2) * | 1977-07-25 | 1979-02-21 |
-
1981
- 1981-06-22 JP JP1981092723U patent/JPS6311742Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57203562U (2) | 1982-12-24 |
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