JPS631335U - - Google Patents

Info

Publication number
JPS631335U
JPS631335U JP1986095148U JP9514886U JPS631335U JP S631335 U JPS631335 U JP S631335U JP 1986095148 U JP1986095148 U JP 1986095148U JP 9514886 U JP9514886 U JP 9514886U JP S631335 U JPS631335 U JP S631335U
Authority
JP
Japan
Prior art keywords
ground
lead
semiconductor element
electrode
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986095148U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986095148U priority Critical patent/JPS631335U/ja
Publication of JPS631335U publication Critical patent/JPS631335U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07351Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/321Structures or relative sizes of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図はこの考案の一実施例を示す側面図、第
2図はこの斜視図を示す。第3図は、従来の方式
によるワイヤボンデイングの一例を示す平面図で
あり、第4図はこれの―′断面図、第5図は
―′断面図、および第6図はこれの斜視図を
示す。 図において、1は半導体素子、2はダイスパツ
ド、3はワイヤ、4はアースワイヤ、5はインナ
ーワイヤ、7はダイスパツド沈め量、8はアース
リード加工部、9はリードフレーム保持部、10
はダイボンド用ろう材または接着剤、11はアル
ミ電極、12はアースワイヤ接続部、13はアー
スリード引上げ量である。なお、図中、同一符号
は同一または相当部分を示す。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) その表面に電極を有する半導体素子と、 前記半導体素子が取付けられるダイスパツド領
    域と、前記半導体素子の接地電極とをワイヤボン
    デイングにて接続されるアースリードを有するリ
    ードフレームと、 前記半導体素子の前記電極へワイヤボンデイン
    グにより接続されるインナーリードとを備え、 前記リードフレームの前記ダイスパツド領域の
    面は、前記インナーリードの面より下げられ、 前記アースリードのアースワイヤ接続部のレベ
    ルは、前記インナーリードのレベルと同一に形成
    されたことを特徴とする半導体装置。 (2) 前記アースリードのアースワイヤの接続レ
    ベルの形成は、アースリードの曲げ加工により得
    ることを特徴とする、実用新案登録請求の範囲第
    1項記載の半導体装置。
JP1986095148U 1986-06-20 1986-06-20 Pending JPS631335U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986095148U JPS631335U (ja) 1986-06-20 1986-06-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986095148U JPS631335U (ja) 1986-06-20 1986-06-20

Publications (1)

Publication Number Publication Date
JPS631335U true JPS631335U (ja) 1988-01-07

Family

ID=30959364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986095148U Pending JPS631335U (ja) 1986-06-20 1986-06-20

Country Status (1)

Country Link
JP (1) JPS631335U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032989A (ja) * 2005-10-07 2006-02-02 Yamaha Corp 半導体パッケージ及び半導体パッケージの製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032989A (ja) * 2005-10-07 2006-02-02 Yamaha Corp 半導体パッケージ及び半導体パッケージの製造方法

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