JPS63200921U - - Google Patents

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Publication number
JPS63200921U
JPS63200921U JP9302887U JP9302887U JPS63200921U JP S63200921 U JPS63200921 U JP S63200921U JP 9302887 U JP9302887 U JP 9302887U JP 9302887 U JP9302887 U JP 9302887U JP S63200921 U JPS63200921 U JP S63200921U
Authority
JP
Japan
Prior art keywords
storage section
adder
time
series data
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9302887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9302887U priority Critical patent/JPS63200921U/ja
Publication of JPS63200921U publication Critical patent/JPS63200921U/ja
Pending legal-status Critical Current

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  • Complex Calculations (AREA)
  • Picture Signal Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係るデジタルフイルタの一実
施例を示すブロツク図、第2図は本考案の他の実
施例を示すブロツク図、第3図、第4図は従来の
デジタルフイルタの構成を示すブロツク図である
。 20,22,30〜37……シフトレジスタ、
21,23……ROM、24,25,27,29
……レジスタ、26,28……加算器。
Fig. 1 is a block diagram showing one embodiment of a digital filter according to the present invention, Fig. 2 is a block diagram showing another embodiment of the present invention, and Figs. 3 and 4 show the configuration of a conventional digital filter. FIG. 20, 22, 30-37...shift register,
21, 23...ROM, 24, 25, 27, 29
...Register, 26, 28...Adder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の時系列データの上位データの各ビツトが
そのアドレスに入力される第1の記憶部と、前記
複数の時系列データの下位データの各ビツトがそ
のアドレスに入力される第2の記憶部と、前記第
1の記憶部および前記第2の記憶部の出力を加算
する第1の加算器と、この第1の加算器の出力を
累算する第2の加算器とを有し、前記第1の記憶
部および前記第2の記憶部にそのアドレスに入力
される時系列データに対応するフイルタ演算結果
をあらかじめ格納しておくことを特徴とするデジ
タルフイルタ。
a first storage section into which each bit of upper-order data of the plurality of time-series data is input to its address; and a second storage section into which each bit of lower-order data of the plurality of time-series data is inputted to its address; , a first adder for adding the outputs of the first storage section and the second storage section, and a second adder for accumulating the outputs of the first adder; 1. A digital filter, wherein filter operation results corresponding to time-series data input to the addresses are stored in advance in the first storage unit and the second storage unit.
JP9302887U 1987-06-17 1987-06-17 Pending JPS63200921U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9302887U JPS63200921U (en) 1987-06-17 1987-06-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9302887U JPS63200921U (en) 1987-06-17 1987-06-17

Publications (1)

Publication Number Publication Date
JPS63200921U true JPS63200921U (en) 1988-12-23

Family

ID=30955256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9302887U Pending JPS63200921U (en) 1987-06-17 1987-06-17

Country Status (1)

Country Link
JP (1) JPS63200921U (en)

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