JPS6347255B2 - - Google Patents

Info

Publication number
JPS6347255B2
JPS6347255B2 JP56212106A JP21210681A JPS6347255B2 JP S6347255 B2 JPS6347255 B2 JP S6347255B2 JP 56212106 A JP56212106 A JP 56212106A JP 21210681 A JP21210681 A JP 21210681A JP S6347255 B2 JPS6347255 B2 JP S6347255B2
Authority
JP
Japan
Prior art keywords
film
silicon
polycrystalline silicon
single crystal
silicon film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56212106A
Other languages
Japanese (ja)
Other versions
JPS58116721A (en
Inventor
Junji Sakurai
Seiichiro Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56212106A priority Critical patent/JPS58116721A/en
Publication of JPS58116721A publication Critical patent/JPS58116721A/en
Publication of JPS6347255B2 publication Critical patent/JPS6347255B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3814—Continuous wave laser beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3458—Monocrystalline
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3818—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/382—Scanning of a beam

Landscapes

  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 本発明は、多結晶半導体にレーザ・ビーム、電
子ビームなどの高エネルギ・ビームを照射して単
結晶半導体に変換する工程が含まれる半導体装置
の製造方法の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for manufacturing a semiconductor device, which includes a step of converting a polycrystalline semiconductor into a single-crystalline semiconductor by irradiating a polycrystalline semiconductor with a high-energy beam such as a laser beam or an electron beam.

従来、第１図に見られるように、シリコン半導
体基板１に選択的に二酸化シリコン絶縁膜２を形
成し、次に、全面に多結晶シリコン膜３を形成
し、次に、例えばレーザ・ビームLBを矢印Ａ方
向に走査して多結晶シリコン膜３を単結晶シリコ
ン膜３′に変換するものである。この技術は一般
に、レーザ・アニールに依るラテラル・エピタキ
シヤル成長法と呼んでいる。 Conventionally, as shown in FIG. 1, a silicon dioxide insulating film 2 is selectively formed on a silicon semiconductor substrate 1, a polycrystalline silicon film 3 is then formed on the entire surface, and then, for example, a laser beam LB is applied. is scanned in the direction of arrow A to convert polycrystalline silicon film 3 into single crystal silicon film 3'. This technique is commonly referred to as lateral epitaxial growth using laser annealing.

ところで、この従来技術に依る場合、絶縁膜２
上の単結晶シリコン膜３′が剥離する事故がしば
しば発生している。その理由は次の通りであると
考えられている。即ち、二酸化シリコンは単結晶
シリコンに比較すると、常温に於いて熱伝導率が
２桁も低い。従つて、シリコン半導体基板１上の
多結晶シリコン膜３が充分にアニールされ、単結
晶シリコン膜３′に変換される条件でレーザ・ビ
ームLBを照射すると二酸化シリコン絶縁膜２上
の多結晶シリコン膜３は過剰アニールになつてし
まうからである。 By the way, when relying on this conventional technology, the insulating film 2
Accidents in which the upper single crystal silicon film 3' peels off often occur. The reason is believed to be as follows. That is, compared to single crystal silicon, silicon dioxide has a thermal conductivity that is two orders of magnitude lower at room temperature. Therefore, when the laser beam LB is irradiated under conditions such that the polycrystalline silicon film 3 on the silicon semiconductor substrate 1 is sufficiently annealed and converted into a single crystal silicon film 3', the polycrystalline silicon film on the silicon dioxide insulating film 2 is irradiated with the laser beam LB. This is because 3 results in excessive annealing.

本発明は、高エネルギ・ビームでアニールされ
るべき多結晶シリコン膜の下地として単結晶シリ
コンと二酸化シリコンとが混在する場合であつて
も、どの部分の多結晶シリコン膜も過不足なく均
一にアニールされて単結晶化され、剥離など発生
することのないようにするものであり、以下これ
を詳細に説明する。 The present invention is capable of uniformly annealing any part of the polycrystalline silicon film without too much or too little, even when monocrystalline silicon and silicon dioxide coexist as the base of the polycrystalline silicon film to be annealed with a high-energy beam. This is to prevent the formation of a single crystal by peeling, and this will be explained in detail below.

第２図乃至第６図は本発明一実施例を説明する
為の工程要所に於ける半導体装置の要部断面図で
あり、次に、これ等の図を参照しつつ説明する。 FIGS. 2 to 6 are sectional views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention, and the following description will be made with reference to these figures.

第２図参照 (1) 面指数例えば（100）である単結晶シリコン
半導体基板１１に熱酸化法にて厚さ例えば8000
〔Å〕の二酸化シリコン絶縁膜１２を形成する。Refer to Figure 2 (1) A single crystal silicon semiconductor substrate 11 with a surface index of, for example, (100) is thermally oxidized to a thickness of, for example, 8000.
A silicon dioxide insulating film 12 having a thickness of [Å] is formed.

(2) CVD法にて第１の多結晶シリコン膜１３を
厚さ例えば2000〔Å〕程度に形成する。(2) A first polycrystalline silicon film 13 is formed to a thickness of, for example, about 2000 Å using the CVD method.

(3) フオト・リソグラフイ技術にて、第１の多結
晶シリコン膜１３及び二酸化シリコン絶縁膜１
２のパターニングを行ない、素子領域相当部分
を残し他を除去する。(3) First polycrystalline silicon film 13 and silicon dioxide insulating film 1 are formed using photolithography technology.
2 patterning is performed to leave a portion corresponding to the element area and remove the rest.

第３図参照 (4) CVD法にて再び多結晶シリコンの成長を行
ない、全面に第２の多結晶シリコン膜１４を厚
さ例えば3000〔Å〕程度に形成する。Refer to FIG. 3 (4) Polycrystalline silicon is grown again by the CVD method to form a second polycrystalline silicon film 14 to a thickness of, for example, about 3000 Å over the entire surface.

第４図参照 (5) CVD法にて窒化シリコン膜１５を厚さ例え
ば500〔Å〕程度に形成する。この窒化シリコン
膜１５はレーザ・アニールで生成された単結晶
シリコン膜の表面の平坦性を維持する為と、レ
ーザ照射時の反射防止膜として作用させる為で
ある。Refer to FIG. 4 (5) A silicon nitride film 15 is formed to a thickness of, for example, about 500 [Å] by CVD method. This silicon nitride film 15 is used to maintain the flatness of the surface of the single crystal silicon film produced by laser annealing, and to act as an antireflection film during laser irradiation.

(6) 同じくCVD法にて燐硅酸ガラス膜１６を厚
さ例えば１〔μｍ〕程度に成長させる。この燐
硅酸ガラス膜１６は窒化シリコン膜１５より低
屈折率であるから反射防止に一層有効であり、
また、厚く形成できるので機械的抑止力が大で
あるから単結晶シリコンの平坦性維持に卓効が
あり、更にまた、多結晶シリコン膜１４と窒化
シリコン膜１５との間の歪を防止することもで
きる。(6) Similarly, a phosphosilicate glass film 16 is grown to a thickness of, for example, about 1 [μm] using the CVD method. This phosphosilicate glass film 16 has a lower refractive index than the silicon nitride film 15, so it is more effective in preventing reflection.
In addition, since it can be formed thickly, it has a large mechanical restraining force, which is extremely effective in maintaining the flatness of single crystal silicon, and furthermore, it prevents distortion between the polycrystalline silicon film 14 and the silicon nitride film 15. You can also do it.

第５図参照 (7) 出力10〔Ｗ〕のCWアルゴン・レーザで10
〔cm／秒〕の走査をしてアニールを行なうと第
１の多結晶シリコン膜１３及び第２の多結晶シ
リコン膜１４はともに単結晶シリコン膜１７に
変換される。この場合、二酸化シリコン絶縁膜
１２上には多結晶シリコン膜１３及び１４が存
在しているので、単結晶シリコン半導体基板１
１上の多結晶シリコン膜１４と比較すると多結
晶シリコン膜１３の分だけ厚くなつている。従
つて、単結晶シリコン半導体基板１１上の多結
晶シリコン膜１４が適正にアニールされる条件
でレーザ・ビーム照射を行なうと、二酸化シリ
コン絶縁膜１２上の多結晶シリコン膜１３，１
４も適正にアニールされるものである。See Figure 5 (7) 10 with a CW argon laser with an output of 10 [W].
When annealing is performed with scanning at [cm/sec], both the first polycrystalline silicon film 13 and the second polycrystalline silicon film 14 are converted into a single-crystalline silicon film 17. In this case, since polycrystalline silicon films 13 and 14 are present on the silicon dioxide insulating film 12, the single crystal silicon semiconductor substrate 1
Compared to the polycrystalline silicon film 14 above 1, it is thicker by the amount of the polycrystalline silicon film 13. Therefore, when laser beam irradiation is performed under conditions that properly anneal the polycrystalline silicon film 14 on the single-crystal silicon semiconductor substrate 11, the polycrystalline silicon films 13, 1 on the silicon dioxide insulating film 12 are
4 is also properly annealed.

第６図参照 (8) 燐硅酸ガラス膜１６及び窒化シリコン膜１５
を除去してから二酸化シリコン膜１２上の単結
晶シリコン膜１７に半導体素子を形成する。See Figure 6 (8) Phosphorsilicate glass film 16 and silicon nitride film 15
After removing the silicon dioxide film 12, a semiconductor element is formed on the single crystal silicon film 17 on the silicon dioxide film 12.

以上の説明で判るように、本発明に依れば、単
結晶シリコンと二酸化シリコンとが混在する面に
多結晶シリコン膜を形成し、その多結晶シリコン
膜に高エネルギ・ビーム照射を行つて単結晶化す
るに際し、二酸化シリコン上の多結晶シリコン膜
を単結晶シリコン上のそれよりも厚く形成するこ
とにより、二酸化シリコンの熱伝導率が低くて
も、そこで過剰アニールが生じることを防止する
ことができるので、単結晶シリコン膜の剥離の問
題は生じない。 As can be seen from the above explanation, according to the present invention, a polycrystalline silicon film is formed on a surface where single crystal silicon and silicon dioxide coexist, and the polycrystalline silicon film is irradiated with a high energy beam to form a single crystal silicon film. During crystallization, by forming the polycrystalline silicon film on silicon dioxide to be thicker than that on single-crystal silicon, it is possible to prevent excessive annealing from occurring even though the thermal conductivity of silicon dioxide is low. Therefore, the problem of peeling off of the single crystal silicon film does not occur.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来例の説明図、第２図乃至第６図は
本発明一実施例を説明する為の工程要所に於ける
半導体装置の要部断面図である。 図に於いて、１１は基板、１２は絶縁膜、１
３，１４は多結晶シリコン膜、１７は単結晶シリ
コン膜である。 FIG. 1 is an explanatory diagram of a conventional example, and FIGS. 2 to 6 are sectional views of essential parts of a semiconductor device at key process points for explaining an embodiment of the present invention. In the figure, 11 is a substrate, 12 is an insulating film, 1
3 and 14 are polycrystalline silicon films, and 17 is a single crystal silicon film.

Claims (1)

【特許請求の範囲】[Claims] １ シリコン半導体基板（或いは層）上に選択的
に二酸化シリコン絶縁膜を形成し、次に、該二酸
化シリコン絶縁膜上には厚く且つ前記シリコン半
導体基板（或いは層）上には薄く多結晶シリコン
膜を形成し、次に、それ等多結晶シリコン膜に高
エネルギ・ビームを照射して単結晶化する工程が
含まれてなることを特徴とする半導体装置の製造
方法。1. A silicon dioxide insulating film is selectively formed on a silicon semiconductor substrate (or layer), and then a polycrystalline silicon film is formed thickly on the silicon dioxide insulating film and thinly on the silicon semiconductor substrate (or layer). 1. A method for manufacturing a semiconductor device, comprising the steps of forming a polycrystalline silicon film, and then irradiating the polycrystalline silicon film with a high-energy beam to form a single crystal.
JP56212106A 1981-12-30 1981-12-30 Preparation of semiconductor device Granted JPS58116721A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56212106A JPS58116721A (en) 1981-12-30 1981-12-30 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56212106A JPS58116721A (en) 1981-12-30 1981-12-30 Preparation of semiconductor device

Publications (2)

Publication Number Publication Date
JPS58116721A JPS58116721A (en) 1983-07-12
JPS6347255B2 true JPS6347255B2 (en) 1988-09-21

Family

ID=16616974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56212106A Granted JPS58116721A (en) 1981-12-30 1981-12-30 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS58116721A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0291556A (en) * 1988-09-29 1990-03-30 Fujikura Ltd Oxygen concentration analyzer

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0773095B2 (en) * 1985-08-20 1995-08-02 沖電気工業株式会社 Method for manufacturing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0291556A (en) * 1988-09-29 1990-03-30 Fujikura Ltd Oxygen concentration analyzer

Also Published As

Publication number Publication date
JPS58116721A (en) 1983-07-12

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