JPS6367015A - Solid-state relay - Google Patents

Abstract

PURPOSE:To quicken turn-off by providing an FET for emitting a voltage generated by an afterglow of a photovoltaic element, and a storage charge of a MOSFET. CONSTITUTION:When a photovoltaic element 1 receives an irradiation of light, a reverse current is generated. A gate of a depression FET 3 is biased to negative and becomes OFF. Simultaneously, a voltage of plus is impressed to a gate 2a of V-MOSs 2, 2', and the V-MOSs 2, 2' become ON. When an electric conduction to a light emission diode 4 is stopped, the irradiation stops. However, since a voltage by an afterglow is left, and also, a storage charge of the MOSFET 3 exists, the MOSFET 3 is not turned off immediately. In this case, a voltage of a gate 3b of the FET 3 drops, a current flows to the FET 3, and a current of the photovoltaic element 1 by the afterglow is short-circuited. Also, since the storage charge of the V-MOSs 2, 2' dissipates, turn-off is quickened.

Description

[Detailed description of the invention] [Industrial application field]

The present invention is an insulated gate field effect transistor (MOS).
This relates to solid-state relays that employ FETs.

[Conventional technology]

As a conventional solid state relay, for example, as shown in FIG. 3, there is one in which a photovoltaic element 31 consisting of a photodiode and a MOS FET 32 are combined via a control circuit 33. In this solid state relay, the input signal is input terminal 3.
4, the LED (light emitting diode) 35 emits light, and the photovoltaic voltage generated by irradiating the photovoltaic element 31 arranged in close proximity is applied to the MOS FET 32.
A gate voltage is applied to the gate 32a of the output switch to turn on the output switch. Conversely, when the input signal is removed, the voltage across photovoltaic element 31 decreases, causing the gate charge of MOS FET 32 to discharge, thereby turning off the output switch.

[Problems to be solved by the invention]

However, with conventional solid-state relays, the time from when an input signal is applied until the output switch is turned on (rise) and from when the input signal is removed until the output switch is turned off (fall) is 30 minutes.
It was slow at about 0μ/sec, and its switching characteristics were a problem. To solve this problem, increase the voltage of the input signal and
It is conceivable to increase the light amount of D and increase the rise speed, but if the LED 36 is turned off and the input signal is removed, if the light from the LED 36 is strong, there will be afterglow on the photovoltaic element 31. Since the voltage tends to remain, there is a problem in that the voltage drops slowly and the falling speed of switching further slows down. The present invention was developed to solve the above-mentioned problems, and is a solid-state device with excellent switching characteristics that has fast rise and fall speeds when driving an output switch using an input signal from a photovoltaic element. The purpose is to provide a relay.

[Means to solve the problem]

In order to achieve the above object, the present invention has been developed in accordance with FIG.
In A), in the solid state relay comprising an insulated gate field effect transistor connected to a photovoltaic element via a control circuit, the anode 1B of the photovoltaic element 1
is connected to the gate 3 of the field effect transistor 3 through the resistor R2.
b, and connects the anode 1B of the photovoltaic element 1 to the drain 3C of the field effect transistor 3 and the gate 2a of the insulated gate field effect transistor 2,
Further, the cathode 1b of the photovoltaic element 10 is connected to the gate 3b of the field effect transistor 3, and is connected to the source 2b of the insulated gate field effect transistor 2 via the source 3a of the field effect transistor 3. This is a solid state relay.

[Effect]

To explain the operation based on the structure of the present invention, first, when a photovoltaic element is irradiated with light, a positive current is generated at its anode and a negative current is generated at its cathode, and this negative current drives the gate of a field effect transistor. When biased, no current flows between the drain and source of the transistor, and when a positive voltage is applied to the gates of MoS2 and MoS2, in the case of n-channel MO8, the MOS is switched on and current flows. In other words, when the photovoltaic element is generating electricity, the gate of the field effect transistor is biased, and as mentioned above, no current flows, and since the resistor R2 is included, the voltage is the same as that of the two MOS transistors, regardless of the field effect transistor.
MO is used as the voltage between the gate and source of the FET.
Drive S FET. Next, when the power to the light emitting diode is stopped, the light irradiation to the photovoltaic element stops and no voltage is generated, but even if the light irradiation is stopped, a voltage remains due to the afterglow, and the MOS FET
However, in the present invention, by incorporating an FET into the control circuit, the residual voltage and the accumulated charge are short-circuited, thereby accelerating the fall speed until the switch is turned off.

【Example】

Hereinafter, embodiments of the solid state relay of the present invention will be described in detail with reference to the drawings. As shown in FIG. 1(A), the circuit configuration in this example is such that the 1-nonide 1a of the photovoltaic element 1 is connected to the gate 28 of an insulated gate field effect transistor (MOS FET) and Effect transistor (FET) 3
is connected to the drain 3c of the FE
Connected to gates 1-3b of T3. The cathode 1b of the photovoltaic element 1 is connected to the sources 2b of the MOS FETs 2 and 2' via a resistor R3, and
is connected to the source 3a of F via the resistor R3, and
Connected to ET 3's game 1-3b. In this example, V-MOSFE is used as the MO3FET.
T, which is basically the same as the DSA type MO3, uses a type of self-alignment FET that attempts to control the channel width by vertical diffusion, but the present invention is not limited to this. do not have. Furthermore, the above MO3FET2 and FET3 were each of n-channel type. The circuit operation of this embodiment will be explained next. As shown in FIG. 1(A), when the light emitting diode 4 is energized, the light emitting diode 4 emits light and the photovoltaic element 1 is irradiated with light. When the pn junction of the photovoltaic element 1 is reverse biased and the junction is irradiated with light, a reverse current is generated at the pn junction, with the cathode 1b side being negative and the anode 1a side being positive. Since the gate 3b of the depletion type FET 3 is negatively biased, the depletion layer expands and the channel narrows, blocking the channel. Therefore, no current flows between the drain 3C and source 38 of the FET 3 (cutoff). In the depletion type FET used here, carriers exist in the channel even when the gate bias is set to 0, and it has conductance.
For n-channels, conductance decreases when set to negative). At the same time, MO3I 2 , MO which is V-MOS
When a positive voltage is applied to the gate 2a of S22' with reference to the substrate gate Gs and the source 2b, n
In the case of channel V-MOS, since the inversion layer on the surface of P-type silicon is inverted to n-type to form an n-channel, V-M
The OS turns on and current flows. In other words, the V-MOS on the side where the drain 2C is positive
turns on. In addition, the V-MOS on the side where the drain 2c' is negative 7th is the substrate gate 1-Gs.
From the gate 2a to the drain 2C due to the forward direction of the pn junction.
Current flows regardless of the state of That is, two V-MOSs connected in series, MOS12 and MOS22'
An AC switch is configured, and when current is supplied to the light emitting diode 4, the current flows regardless of the direction of the voltage applied to the load RL. While the photovoltaic element 1 is generating electricity, the gate 3b of the FET 3 is biased and the connection between the source 3a and the drain 30 is in a cut-off state, and the resistor R2 is included, so the voltage remains at two V regardless of the FET 3. - Used as the voltage between the gate and source of the MOS, and drives the V-MOS. In this embodiment, the number of V-MOS is MO8I, MOS2
Although the number is 2, it is also possible to use a number above 9. Next, when the power to the light emitting diode 4 is stopped, the irradiation of light to the photovoltaic element 1 is stopped and no voltage is generated. However, in the photovoltaic element, even after the light irradiation is stopped, a voltage remains due to afterglow, and due to the accumulated charge of the MO3FET, the fall until the switch is turned off is delayed. Therefore, in the circuit of this embodiment, by incorporating an FET into the control circuit 33 shown in FIG. 3, it is possible to short-circuit the residual voltage caused by the afterglow and the accumulated charge, thereby increasing the falling speed. The circuit operation of B is as shown in FIG. 1(A). When the light emitting diode 4 stops irradiating and the electromotive force of the photovoltaic element 1 gradually decreases, the voltage applied to the gate 1-3b of the FET 3 decreases. decreases, the depletion layer becomes narrower, and a current flows between the drain 3C and the source 38, resulting in a short circuit of the current due to the afterglow of the photovoltaic element 1. This allows V-MO
The voltage applied to the gate 2B of S disappears and V-M
Turn off the OS. That is, only the V-MO 8 on the side where the drain 2c is positive is turned off. At the same time, the field effect transistor F
Since the gate bias of ET 3 is also eliminated and the field effect transistor FET 3 is turned on, the MOS of V-MOS
12. Short-circuit between the gate 2a of the MOS 22', the source 2b, and the substrate gate Gs. Therefore, even if the driving of the light emitting diode LED stops and the voltage of the photovoltaic element 1 disappears, the carrier (7) accumulation niori V-MO3 (
7) Although the gates 2a of the MOS 12 and MO822' are not at a completely low level, the accumulated carriers are bypassed by turning on the field effect transistor FET 3, thereby speeding up the fall. Next, FIG. 1(B) shows a circuit configuration diagram of another embodiment of the present invention. The circuit configuration of this other embodiment differs from the previous embodiment in that when the cathode 1b of the photovoltaic element 1 is connected to the source 2b of the MOS FET 2.2' via the source 3a of the FET 3, the resistor R3 is Gate 1-3b in FET 3 without passing through
After 3 days from the source, it is connected to the source 2b of the MOS FETs 2 and 2' (see CB in FIG. 1). The configuration other than this is the same as the previous embodiment. The circuit operation of this other embodiment is similar to the previous embodiment, when the voltage is applied to the gates of V-MOS2, 2', the gates are turned on, and the voltage applied to the load RL of V-MOS 2.2' is turned on. Current flows regardless of direction (switch turned on). Next, when the power to the light emitting diode 4 is stopped, the light irradiation to the photovoltaic element 1 is stopped and no voltage is generated, but as in the previous embodiment, the voltage remains due to afterglow and the MOS FE
The accumulated charge of T slows down the turn-off of the switch. Therefore, the circuit operation of this embodiment is as shown in FIG. 1(B).
The depletion layer of V-MOS 2.3 becomes narrow (and current flows between the drain 3c and the source 38), so the charges accumulated in the V-MOS are shunted out and the gate 2 of the V-MOS 2.2'
The voltage applied to 8 disappears, turning off the V-MOS. That is, only the V-MOS is turned off on the side where the drain 2C becomes positive. Similarly to the previous embodiment, in this other embodiment, the FET in the control circuit operates at the falling edge to bypass the accumulated carriers and eliminate the gate voltage of the MOS FET. As a result, compared to conventional switching characteristics, we were able to significantly speed up the falling edge. The results of the switching characteristics of this example are shown in the graph of FIG. It is a graph showing the rise and fall speeds in turn-on and turn-off cases while changing the load of RL. Current I flowing through the light emitting diode
A was always kept constant at 30 mA and measured. -12= Conventional relays had slow switching characteristics of about 300μ/sec, but the relay of this embodiment has a rising and falling speed of 100μ/sec or less, as seen in the graph above. It can be carried out. [Effect] As described above, the present invention provides a solid state relay in which an insulated gate field effect transistor is connected to a photovoltaic element via a control circuit, in which the anode of the photovoltaic element is connected to an electric field via a resistor. the anode of the photovoltaic element is connected to the drain of the field effect transistor and the gate of the insulated gate field effect transistor, and the cathode of the photovoltaic element is connected to the electric field. Since it is connected to the gate of the effect transistor and also connected to the source of the insulated gate field effect transistor via the source of the field effect transistor, it is possible to improve the switching characteristics of the solid state relay, especially the falling speed. Ta.

[Brief explanation of the drawing]

FIG. 1(A) is a circuit configuration diagram of an embodiment of the present invention.
Figure (B) is a circuit configuration diagram of another embodiment of the present invention, and Figure 2 is a graph showing the switching characteristics of the present invention.
FIG. 3 shows a conventional example. 1... Photovoltaic element, 1a... Anode, l
b. #SoF, 2, 2'-V-MO3FET. 2B...gate, 2b...source, 2c
...Drain, 3...FET.

Claims (1)

[Claims] A solid state relay comprising an insulated gate field effect transistor connected to a photovoltaic element via a control circuit, wherein the anode of the photovoltaic element is connected to the gate of the field effect transistor via a resistor. and connecting an anode of the photovoltaic device to a drain of a field effect transistor and a gate of the insulated gate field effect transistor, and further connecting a cathode of the photovoltaic device to a gate of the field effect transistor. 1. A solid state relay, wherein the solid state relay is connected to the source of the insulated gate field effect transistor via the source of the field effect transistor.