JPS636873A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reproducibly manufacture a device whose characteristis are not deteriorated in a heating process, by adding Ga and As beforehand to a gate electrode material. CONSTITUTION:A SiO2 film is piled over the whole surface of a semiinsulating GaAs substrate 1, and Si ions are then implanted into definite positions through this film to form an active layer 2. Successively the SiO2 film is removed, and then a gate-electrode material 3' is piled thereon. In this process, W and Si targets whereto Ga and As are added are used to pile tungsten silicide whereto Ga and As are added by sputtering method. The material 3' is processed into a definite pattern 3, and Si ions are implanted with the gate electrode 3 seving as a mask to form a low-resistance layer 4 for an ohmic electrode. A SiO2 film 5 is piled as an annealing cap film to activate the Si, so that an ohmic electrode 6 can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor device using a compound semiconductor, and particularly to a Schottky electrode portion thereof.

[Prior art]

Gallium arsenide (GaAs) M E 5FE manufactured by self-alignment method using high melting point metal as gate material
Various high melting point materials have been tried as the gate material for T. - For example, it is known that relatively good properties can be obtained by using high-melting point metal silicides (see, for example, JP-A-57-113289).

[Problem that the invention seeks to solve]

Conventionally, trace amounts of impurities in gate electrodes using various metal acids or metal silicides have not been considered a particular problem. That is,
A trace amount of gallium (G
a) Or the diffusion of arsenic (A s ) into the gate electrode is ignored. However, when the thickness of the n-channel layer formed under the gate electrode is reduced to ~100 nm or less, device characteristics such as fluctuations in threshold voltage due to diffusion of Ga or As into the gate electrode may be affected. The negative effects of this have become impossible to ignore.

An object of the present invention is to provide an effective gate electrode structure that does not significantly affect the characteristics of a compound semiconductor device even after undergoing high-temperature heat treatment during the manufacturing process of the device.

[Means for solving problems]

Materials for gate electrodes include (1) tungsten (W);
, molybdenum (Mo), tantalum (Ta).

Heat-resistant metals such as titanium (Ti) and rhenium (Re), (
High melting point materials are suitable, such as 2) alloys of the metals, (3) silicides of the metal acids or alloys of the metals, and (4) nitrides of the gold HI or alloys of the metals.

Gallium (Ga) as the gate electrode material.

When adding arsenic (As) or both, the amount added depends on the type of material, film quality, etc.

It is preferable that the solubility of Ga and As in each material be equal to or higher. When added in excess of the solubility, excess Ga or As precipitates at defects such as grain boundaries, suppressing diffusion through the defects. Atomic % due to the purpose of using it as a gate electrode
The limit is about 0.1%.

In the case of using the above-mentioned high melting point material, a sputter deposition method is usually used as a manufacturing method. In this case, Ga or As is added to the base material in advance.

In addition, the addition of Ga and As can be applied to gallium arsenide (GaAs),
A target such as gallium nitride (G a N ) may be used for simultaneous or alternating sputter deposition with other materials. In addition, a vacuum evaporation method or the like can also be used. In this case, Qa or As may be deposited at the same time as the gate material is deposited. This method has the advantage that the amounts of Ga and As added can be easily controlled.

[Effect]

Ga or As mentioned as the problem which is the premise of the present invention
Diffusion into the gate electrode material is caused by the difference in chemical potential between Ga or As in the semiconductor substrate and the gate electrode material as a driving force. The present invention provides G in the gate electrode material.
By adding a, As in advance and reducing the above-mentioned driving force, diffusion of Ga and As can be suppressedff1l
f L/obtain.

〔Example〕

Embodiment 1 A first embodiment of the present invention will be described based on FIG. A SiO2 film with a thickness of 50 nm is deposited on the entire surface of a semi-insulating GaAs substrate l, and then Si ions are deposited at predetermined locations through this 8102 film at an accelerating voltage of 75 kV.
By implanting at a concentration of 5102, an active region 2 is formed as shown in FIG.
′ is deposited. Here, a W target doped with Ga and As and a Si target are used, and tungsten silicide doped with A and As is deposited by sputtering simultaneously or alternately.

The concentration of Ga and As in the W target is from several lOppm to several ppm. Further, the film thickness is approximately 300 nm.

Next, the gate electrode material is processed into a predetermined pattern 3,
Furthermore, using the gate electrode 3 as a mask, Si ions are implanted to form a low resistance layer 4 for an ohmic electrode as shown in FIG. 1(e).

Next, as shown in FIG. 1(d), a Si○2 film 5 with a thickness of about 200 nm was deposited as a cap film for annealing, and the film was heated at 800°C.
After activating the implanted St by annealing for 20 minutes, an ohmic electrode 6 is formed as shown in FIG. 1(a). In this way, GaAsMESFET is completed.

When Ga or As is not added to the gate electrode, the conductivity value (conduct, ance constant) of the FET
was only 1.2 (gate length 1 μm), whereas
In the FET according to this example, the K value was improved to 1.4.

In addition, although the case where tungsten silicide and tungsten are used as gate electrode materials has been described here, in addition to the above-mentioned heat-resistant metals, titanium silicide, tantalum silicide, molybdenum silicide, and Ti may also be used.

Silicides of alloys of Ta, W, Mo, e.g.

Similar effects can be obtained when using titanium-tungsten silicide, tantalum-tungsten silicide, etc., or when using nitrides of the above-mentioned high-melting point metals and alloys (e.g., tungsten nitride, molybdenum nitride). .

Actual M1 Example 2° Tungsten doped with Ga is used as the gate electrode material in the previous example. Addition of Ga can be easily achieved by doping Ga into a W target in advance and performing sputter deposition using the target. W
The concentration of Ga therein is approximately 0.1%.

When Ga was not added, the FET did not operate as desired, but according to this example, it operated with a K value of 1.1 (gate length 1 μm).

Although the above example describes a GaAs MESFET in which the active layer is formed by ion implantation into a semi-insulating substrate, exactly the same effect can be obtained in the case of a well-known MESFET in which the active layer is formed by epitaxial growth. . Furthermore, in the case of a so-called heterojunction FET that uses a two-dimensional electron gas layer, Ga is used in the gate electrode.
By adding As, the stability of the Schottky characteristic of the gate during the heating process can be improved.

〔Effect of the invention〕

According to the present invention, in a semiconductor device having a Schottky electrode on GaAs or AΩGaAs.

It is possible to manufacture a device with good reproducibility without deterioration of the characteristics of the device during the heating process during the manufacturing process.

In particular, although it has been conventionally believed that single high melting point metals have insufficient thermal stability at the interface, the present invention enables the use of single metals such as tungsten.

[Brief explanation of the drawing]

FIG. 1 shows a manufacturing process for manufacturing a MESFET using a compound semiconductor as a substrate. DESCRIPTION OF SYMBOLS 1... Semi-insulating GaAs substrate, 2... Active layer, 3...
... High melting point metal layer, 4... Low resistance layer for ohmic electrode, 5... Cap film for annealing, 6... Ohmic electrode. Patent applicant Kozo Ii J'3, Director of the Institute of Industrial Technology 1.

Claims (1)

[Claims] 1. A Schottky electrode made of a high melting point material containing at least one member of the group consisting of Ga and As is provided on a gallium arsenide substrate or an aluminum gallium arsenide substrate. semiconductor device. 2. The high melting point material is made of a heat-resistant metal from the group of tungsten, molybdenum, tantalum, titanium, and rhenium, an alloy of the heat-resistant metals, and a silicide of the heat-resistant metal or an alloy of these heat-resistant metals. The semiconductor device according to claim 1, wherein the semiconductor device is one selected from the group consisting of: