JPH0581068B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a semiconductor device using a compound semiconductor, and particularly to a shot key electrode portion thereof.

[Prior art] Gallium arsenide (GaAs) manufactured by a self-alignment method using a high melting point metal as the gate material
Various high melting point materials have been tried as gate materials for MESFETs. For example, it is known that relatively good properties can be obtained by using a high melting point metal silicide (see, for example, Japanese Patent Application Laid-Open No. 113289/1989).

[Problem that the invention seeks to solve]

Conventionally, trace amounts of impurities in gate electrodes using various metals or metal silicides have not been considered a particular problem. That is, the diffusion of trace amounts of gallium (Ga) or arsenic (As) into the gate electrode during the high temperature (approximately 800° C.) heating process is ignored. However, when the thickness of the n-channel layer formed under the gate electrode is reduced to ~100 nm or less, Ga or
It has become impossible to ignore the negative effects on device characteristics such as fluctuations in threshold voltage due to the diffusion of As into the gate electrode.

An object of the present invention is to provide an effective gate electrode structure that does not significantly affect the characteristics of a compound semiconductor device even after undergoing high-temperature heat treatment during the manufacturing process of the device.

[Means for solving the problem] Materials for the gate electrode include (1) heat-resistant metals such as tungsten (W), molybdenum (Mo), tantalum (Ta), titanium (Ti), and rhenium (Re); High melting point materials such as (2) alloys of the metals, (3) silicides of the metals or alloys of the metals, and (4) nitrides of the metals or alloys of the metals are preferable.

When adding gallium (Ga), arsenic (As), or both to the above gate electrode material,
The amount added depends on the type of material, film quality, etc., but it is preferably equal to or higher than the solubility of Ga and As in each material. If added above the solubility, excess Ga or
As precipitates in defects such as grain boundaries and suppresses diffusion through the defects. For the purpose of using it as a gate electrode, the limit is about 0.1% in terms of atomic percentage.

In the case of using the above-mentioned high melting point material, a sputter deposition method is usually used as a manufacturing method. In this case, Ga or
As is added to the base material in advance.

Further, Ga and As may be added by sputter deposition simultaneously or alternately with other materials using a target such as gallium arsenide (GaAs) or gallium nitride (GaN). In addition, a vacuum evaporation method or the like can also be used. In this case, Ga or As may be deposited at the same time as the gate material is deposited. This method has the advantage that the amount of Ga and As added can be easily controlled.

[Effect]

Diffusion of Ga or As into the gate electrode material, which has been described as a problem on which the present invention is based, occurs as a driving force due to the difference in chemical potential between Ga or As in the semiconductor substrate and the gate electrode material. In the present invention, diffusion of Ga and As can be suppressed by adding Ga and As to the gate electrode material in advance and reducing the above-mentioned driving force.

〔Example〕

Example 1 A first example of the present invention will be described based on FIG. A SiO ₂ film with a thickness of 50 nm is deposited on the entire surface of a semi-insulating GaAs substrate 1, and then Si ions are deposited at predetermined locations 5× at an accelerating voltage of 75 kV through this SiO ₂ film.
By injecting at a concentration of 10 ¹² cm ^-2 , Figure 1a
The active layer 2 is formed as shown in FIG. Then the corresponding
After removing the SiO ₂ film, a gate electrode material 3' is deposited as shown in FIG. 1b. Here, Ga, As
Tungsten silicide doped with Ga and As is deposited by sputtering simultaneously or alternately using a W target and a Si target doped with Ga and As. The concentration of Ga and As in the W target is from several tens of ppm to several tens of thousands of ppm. Also, the film thickness is approximately
The wavelength shall be 300nm. Next, the gate electrode material is processed into a predetermined pattern 3, and Si ions are implanted using the gate electrode 3 as a mask to form a low resistance layer 4 for an ohmic electrode as shown in FIG. 1c. Next, as shown in Fig. 1d, a SiO ₂ film 5 with a thickness of about 200 nm was deposited as a cap film for annealing, and the implanted Si was activated by annealing at 800°C for 20 minutes. , an ohmic electrode 6 is formed as shown in FIG. 1e. In this way, a GaAs MESFET is completed.

If Ga or As is not added to the gate electrode, the K value (Conductance constant) of the FET is
The K value remained at 1.2 (gate length 1 μm), whereas in the FET according to this example, the K value improved to 1.4.

In addition, although the case where tungsten silicide and tungsten are used as gate electrode materials has been explained here, in addition to the above-mentioned heat-resistant metals, titanium silicide, tantalum silicide, molybdenum silicide, Ti,
When silicides of alloys of Ta, W, and Mo are used, such as titanium-tungsten silicide, tantalum-tungsten silicide, etc., nitrides of the above-mentioned high-melting point metals and alloys (for example, tungsten nitride, molybdenum nitride) are used. A similar effect can be obtained when using .

Example 2 Tungsten doped with Ga is used as the gate electrode material in the previous example. The addition of Ga is
This can be easily achieved by doping Ga into a W target in advance and performing sputter deposition using the target. The concentration of Ga in W is approximately
It shall be 0.1%.

If Ga was not added, the FET did not operate as desired, but according to this example, the K value
1.1 (gate length 1 μm).

Although the above example describes a GaAs MESFET in which the active layer is formed by ion implantation into a semi-insulating substrate, exactly the same effect can be obtained in the case of a well-known MESFET in which the active layer is formed by epitaxial growth. Furthermore, in the case of a so-called heterojunction FET that uses a two-dimensional electron gas layer, the stability of the Schottky characteristic of the gate during the heating process can be improved by adding Ga or As to the gate electrode.

〔Effect of the invention〕

According to the present invention, a semiconductor device having a shot key electrode on GaAs or AlGaAs can be manufactured with good reproducibility without deterioration of device characteristics during a heating step during the manufacturing process.

In particular, although it has been conventionally believed that single high melting point metals have insufficient thermal stability at the interface, the present invention enables the use of single metals such as tungsten.

[Brief explanation of drawings]

Figure 1 shows a structure using a compound semiconductor as the substrate.
The manufacturing process for manufacturing MESFET is shown. DESCRIPTION OF SYMBOLS 1...Semi-insulating GaAs substrate, 2...Active layer, 3...High melting point metal layer, 4...Low resistance layer for ohmic electrode, 5
...Cap film for annealing, 6...Ohmic electrode.

Claims (1)

[Scope of Claims] 1. A semiconductor device having a semi-insulating GaAs substrate, a conductive GaAs layer formed on the substrate, and a shot key electrode formed on the conductive GaAs layer, wherein the conductive GaAs layer The film thickness of the short key electrode is 100 nm or less, and the short key electrode is made of a high melting point material, and at least one selected from the group consisting of Ga and As has a solubility greater than that of the high melting point material.
A semiconductor device characterized in that it contains 0.1 atomic percent or less. 2. The high melting point material is made of a heat-resistant metal from the group of tungsten, molybdenum, tantalum, titanium, and rhenium, an alloy of the heat-resistant metals, and a silicide of the heat-resistant metal or an alloy of these heat-resistant metals. The semiconductor device according to claim 1, which is one selected from the group.