JPS6370596U - - Google Patents
Info
- Publication number
- JPS6370596U JPS6370596U JP16350186U JP16350186U JPS6370596U JP S6370596 U JPS6370596 U JP S6370596U JP 16350186 U JP16350186 U JP 16350186U JP 16350186 U JP16350186 U JP 16350186U JP S6370596 U JPS6370596 U JP S6370596U
- Authority
- JP
- Japan
- Prior art keywords
- display element
- active matrix
- transparent
- matrix display
- signal circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011159 matrix material Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000010409 thin film Substances 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000007689 inspection Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
第１図から第４図はこの考案の一実施例を示し
、第１図はアクテイブマトリクス表示素子の一方
の透明基板の平面図、第２図はそのゲートライン
およびドレインラインの断線不良を検査する状態
を示す図、第３図はゲートラインとドレインライ
ンの短絡不良を検査する状態を示す図、第４図は
その使用状態を示す図、第５図は他の実施例を示
す図、第６図は従来例を示す図である。
１，２０……透明基板、２……薄膜トランジス
タ、３……ゲートライン、４……ドレインライン
、５，６……検査用の薄膜トランジスタ、７……
検査ライン、２１，２２……検査用の接続配線パ
ターン。
Figures 1 to 4 show an embodiment of this invention, with Figure 1 being a plan view of one transparent substrate of an active matrix display element, and Figure 2 being used to inspect the gate line and drain line for disconnection defects. 3 is a diagram showing the state of inspecting the gate line and drain line for short-circuit defects, FIG. 4 is a diagram showing the usage state, FIG. 5 is a diagram showing another embodiment, and FIG. 6 is a diagram showing the state of use. The figure shows a conventional example. 1, 20... Transparent substrate, 2... Thin film transistor, 3... Gate line, 4... Drain line, 5, 6... Thin film transistor for inspection, 7...
Inspection lines, 21, 22...connection wiring patterns for inspection.
Claims (1)
に形成された透明な電極に所定の電圧を印加して
画像等の情報を表示するアクテブマトリクス表示
素子において、 前記一方の透明基板上に透明電極および薄膜ト
ランジスタをマトリクス状に配列するとともに、
これらの間に配線を縦横に形成された信号用回路
と、この信号用回路の横方向もしくは縦方向の配
線を直列的に接続する試験用回路とを備えてなる
アクテイブマトリクス表示素子。[Claims for Utility Model Registration] In an active matrix display element that displays information such as images by sealing a liquid crystal between a pair of transparent substrates and applying a predetermined voltage to transparent electrodes formed on the opposing surfaces, Transparent electrodes and thin film transistors are arranged in a matrix on the one transparent substrate, and
An active matrix display element comprising a signal circuit in which wiring is formed vertically and horizontally between them, and a test circuit in which the horizontal or vertical wiring of the signal circuit is connected in series.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986163501U JPH0648551Y2 (en) | 1986-10-27 | 1986-10-27 | Active matrix display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986163501U JPH0648551Y2 (en) | 1986-10-27 | 1986-10-27 | Active matrix display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6370596U true JPS6370596U (en) | 1988-05-12 |
| JPH0648551Y2 JPH0648551Y2 (en) | 1994-12-12 |
Family
ID=31091757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986163501U Expired - Lifetime JPH0648551Y2 (en) | 1986-10-27 | 1986-10-27 | Active matrix display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0648551Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02157896A (en) * | 1988-12-12 | 1990-06-18 | Sharp Corp | Checking structure and checking method for substrate of matrix display device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6012568U (en) * | 1983-07-06 | 1985-01-28 | 株式会社東芝 | elevator drive device |
| JPS6352121A (en) * | 1987-08-14 | 1988-03-05 | Seiko Instr & Electronics Ltd | Electrooptic device |
-
1986
- 1986-10-27 JP JP1986163501U patent/JPH0648551Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6012568U (en) * | 1983-07-06 | 1985-01-28 | 株式会社東芝 | elevator drive device |
| JPS6352121A (en) * | 1987-08-14 | 1988-03-05 | Seiko Instr & Electronics Ltd | Electrooptic device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02157896A (en) * | 1988-12-12 | 1990-06-18 | Sharp Corp | Checking structure and checking method for substrate of matrix display device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0648551Y2 (en) | 1994-12-12 |
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