JPS6397248U - - Google Patents
Info
- Publication number
- JPS6397248U JPS6397248U JP1987175722U JP17572287U JPS6397248U JP S6397248 U JPS6397248 U JP S6397248U JP 1987175722 U JP1987175722 U JP 1987175722U JP 17572287 U JP17572287 U JP 17572287U JP S6397248 U JPS6397248 U JP S6397248U
- Authority
- JP
- Japan
- Prior art keywords
- series
- conductive layer
- silicon dioxide
- insulating layer
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/62—Capacitors having potential barriers
- H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
- H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
- H10D89/213—Design considerations for internal polarisation in field-effect devices
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
第1図は本考案とともに使用するための回路手
段を含む本考案の概略図、第2図は回路手段の変
形例の概略図、第3図はさらに他の実施例の概略
図、第4図は回路手段の部分を含む本考案の具体
的な実施例の断面図である。 1,2…キヤパシタ、3…下部導電電極板、4
…中間電極板、5…上部導電電極板、6…グラン
ド点、7…P+もしくはN+領域、8…基板、1
0…多結晶層、9,11…絶縁層、12…導電層
、13…付加金属導体、14,15,16,17
…MOSトランジスタ、18…AC信号源、19
…キヤパシタ、20…回路構成、21…ツエナー
ダイオード、22…ダイオード、23…整流ダイ
オード、24…ソース、25…ドレイン、26…
チヤンネル、27…ポリシリコンゲート、28…
接触部。
段を含む本考案の概略図、第2図は回路手段の変
形例の概略図、第3図はさらに他の実施例の概略
図、第4図は回路手段の部分を含む本考案の具体
的な実施例の断面図である。 1,2…キヤパシタ、3…下部導電電極板、4
…中間電極板、5…上部導電電極板、6…グラン
ド点、7…P+もしくはN+領域、8…基板、1
0…多結晶層、9,11…絶縁層、12…導電層
、13…付加金属導体、14,15,16,17
…MOSトランジスタ、18…AC信号源、19
…キヤパシタ、20…回路構成、21…ツエナー
ダイオード、22…ダイオード、23…整流ダイ
オード、24…ソース、25…ドレイン、26…
チヤンネル、27…ポリシリコンゲート、28…
接触部。
Claims (1)
- 【実用新案登録請求の範囲】 (a) 相互に接続された複数のCMOSトランジ
スタ、 (b) 直列に接続された一対のキヤパシタ手段、
該キヤパシタ手段は、高濃度にP又はNをドープ
した基板のシリコン層よりなる底部導電領域と、
該底部導電領域を実質的に覆う第1の二酸化シリ
コン絶縁層と、少なくとも該底部導電領域を覆つ
ている上記第1の二酸化シリコン絶縁層の上に形
成された多結晶シリコンよりなる上部導電層と、
該上部導電層を実質的に覆う第2の二酸化シリコ
ン絶縁層と、上記上部導電層を覆つている第2の
二酸化シリコン絶縁層の上側に配置された最上部
導電層とから構成されている、 (c) 直列に接続され、各々ドレインに短絡され
たゲートを有する複数のMOSトランジスタ、上
記一対のキヤパシタ手段間のジヤンクシヨンは、
上記複数のCMOSトランジスタに接続されると
ともに、上記直列接続された複数のMOSトラン
ジスタの一方の端子に接続されており、上記直列
接続された複数のMOSトランジスタの他方の端
子は上記基板に接続されている、 (d) 上記最上部導電層に接続されたクロツク信
号のための入力端子、 該入力端子は、上記複数のCMOSトランジス
タのうちの所定のものに基板に直接ではなく上記
複数のCMOSトランジスタの一端子にクロツク
信号を印加するために接続されている、 (e) 以上の構造を有しており、上記一端子に印
加されるクロツク信号は、タイミング信号と接続
された複数のMOSトランジスタのための動作電
力の両方を与えるようになつている半導体集積回
路構造。
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/933,984 US4246502A (en) | 1978-08-16 | 1978-08-16 | Means for coupling incompatible signals to an integrated circuit and for deriving operating supply therefrom |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6397248U true JPS6397248U (ja) | 1988-06-23 |
Family
ID=25464753
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10395679A Pending JPS5558563A (en) | 1978-08-16 | 1979-08-15 | Integrated circuit chip assembling signal source and semiconductor strucutre used therefor |
| JP1987175722U Pending JPS6397248U (ja) | 1978-08-16 | 1987-11-16 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10395679A Pending JPS5558563A (en) | 1978-08-16 | 1979-08-15 | Integrated circuit chip assembling signal source and semiconductor strucutre used therefor |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4246502A (ja) |
| JP (2) | JPS5558563A (ja) |
| CA (1) | CA1123523A (ja) |
| DE (1) | DE2929921A1 (ja) |
| GB (1) | GB2028585B (ja) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5811750B2 (ja) * | 1979-06-04 | 1983-03-04 | 株式会社日立製作所 | 高耐圧抵抗素子 |
| JPS57186805A (en) * | 1981-05-14 | 1982-11-17 | Citizen Watch Co Ltd | Integrated circuit for quartz oscillation |
| JPS58119670A (ja) * | 1982-01-11 | 1983-07-16 | Nissan Motor Co Ltd | 半導体装置 |
| US4527180A (en) * | 1983-01-31 | 1985-07-02 | Intel Corporation | MOS Voltage divider structure suitable for higher potential feedback regulation |
| JPS624146U (ja) * | 1986-05-15 | 1987-01-12 | ||
| US5686751A (en) * | 1996-06-28 | 1997-11-11 | Winbond Electronics Corp. | Electrostatic discharge protection circuit triggered by capacitive-coupling |
| US5825079A (en) * | 1997-01-23 | 1998-10-20 | Luminous Intent, Inc. | Semiconductor diodes having low forward conduction voltage drop and low reverse current leakage |
| US5716880A (en) * | 1997-02-20 | 1998-02-10 | Chartered Semiconductor Manufacturing Pte Ltd. | Method for forming vertical polysilicon diode compatible with CMOS/BICMOS formation |
| US6271067B1 (en) | 1998-02-27 | 2001-08-07 | Micron Technology, Inc. | Methods of forming field effect transistors and field effect transistor circuitry |
| EP0987763A1 (en) * | 1998-09-15 | 2000-03-22 | STMicroelectronics S.r.l. | Diode connected transistor and related process of fabrication |
| US6420757B1 (en) | 1999-09-14 | 2002-07-16 | Vram Technologies, Llc | Semiconductor diodes having low forward conduction voltage drop, low reverse current leakage, and high avalanche energy capability |
| US6433370B1 (en) | 2000-02-10 | 2002-08-13 | Vram Technologies, Llc | Method and apparatus for cylindrical semiconductor diodes |
| US6507063B2 (en) * | 2000-04-17 | 2003-01-14 | International Business Machines Corporation | Poly-poly/MOS capacitor having a gate encapsulating first electrode layer |
| US6538300B1 (en) | 2000-09-14 | 2003-03-25 | Vishay Intertechnology, Inc. | Precision high-frequency capacitor formed on semiconductor substrate |
| US7151036B1 (en) * | 2002-07-29 | 2006-12-19 | Vishay-Siliconix | Precision high-frequency capacitor formed on semiconductor substrate |
| US6580150B1 (en) | 2000-11-13 | 2003-06-17 | Vram Technologies, Llc | Vertical junction field effect semiconductor diodes |
| US6633063B2 (en) * | 2001-05-04 | 2003-10-14 | Semiconductor Components Industries Llc | Low voltage transient voltage suppressor and method of making |
| US6537921B2 (en) | 2001-05-23 | 2003-03-25 | Vram Technologies, Llc | Vertical metal oxide silicon field effect semiconductor diodes |
| AU2002331897A1 (en) | 2001-09-27 | 2003-04-07 | Pioneer Hi-Bred International, Inc. | Phytate polynucleotides and methods of use |
| US6958275B2 (en) * | 2003-03-11 | 2005-10-25 | Integrated Discrete Devices, Llc | MOSFET power transistors and methods |
| WO2007071058A1 (en) * | 2005-12-23 | 2007-06-28 | Gosselin Francois | Capacitor based transformer |
| US20110080760A1 (en) * | 2009-10-02 | 2011-04-07 | Chao-Cheng Lu | Rectifier driving circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150987A (en) * | 1975-06-10 | 1976-12-24 | Ibm | Cc2c switching capacitor ladder circuit |
| JPS52144278A (en) * | 1976-05-27 | 1977-12-01 | Toshiba Corp | Circuit for protecting input with respect to mos integrated circuit |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3644850A (en) * | 1969-06-11 | 1972-02-22 | Ibm | Integrated circuit band pass filter |
| US3789246A (en) * | 1972-02-14 | 1974-01-29 | Rca Corp | Insulated dual gate field-effect transistor signal translator having means for reducing its sensitivity to supply voltage variations |
| US4163242A (en) * | 1972-11-13 | 1979-07-31 | Siemens Aktiengesellschaft | MOS storage integrated circuit using individual FET elements |
| US3836992A (en) * | 1973-03-16 | 1974-09-17 | Ibm | Electrically erasable floating gate fet memory cell |
| US3979734A (en) * | 1975-06-16 | 1976-09-07 | International Business Machines Corporation | Multiple element charge storage memory cell |
| NL7609587A (nl) * | 1975-09-08 | 1977-03-10 | Ncr Co | Elektrisch afstembare mnos-capaciteit. |
| FR2365859A1 (fr) * | 1976-09-24 | 1978-04-21 | Thomson Csf | Memoire non volatile pour signaux rapides |
| FR2365858A1 (fr) * | 1976-09-24 | 1978-04-21 | Thomson Csf | Memoire non volatile de longue duree pour signaux rapides |
| US4112509A (en) * | 1976-12-27 | 1978-09-05 | Texas Instruments Incorporated | Electrically alterable floating gate semiconductor memory device |
| US4151021A (en) * | 1977-01-26 | 1979-04-24 | Texas Instruments Incorporated | Method of making a high density floating gate electrically programmable ROM |
-
1978
- 1978-08-16 US US05/933,984 patent/US4246502A/en not_active Expired - Lifetime
-
1979
- 1979-03-02 CA CA322,645A patent/CA1123523A/en not_active Expired
- 1979-07-24 DE DE19792929921 patent/DE2929921A1/de not_active Ceased
- 1979-08-09 GB GB7927802A patent/GB2028585B/en not_active Expired
- 1979-08-15 JP JP10395679A patent/JPS5558563A/ja active Pending
-
1987
- 1987-11-16 JP JP1987175722U patent/JPS6397248U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51150987A (en) * | 1975-06-10 | 1976-12-24 | Ibm | Cc2c switching capacitor ladder circuit |
| JPS52144278A (en) * | 1976-05-27 | 1977-12-01 | Toshiba Corp | Circuit for protecting input with respect to mos integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2929921A1 (de) | 1980-02-28 |
| GB2028585A (en) | 1980-03-05 |
| JPS5558563A (en) | 1980-05-01 |
| GB2028585B (en) | 1983-02-16 |
| US4246502A (en) | 1981-01-20 |
| CA1123523A (en) | 1982-05-11 |
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