JPS641037B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display method for ruled lines, and particularly to a display method for displaying ruled lines in combination with characters and graphics without increasing memory capacity.

As shown in FIG. 1, a dot matrix character display device using television raster scan is composed of an interface control section 4, a code memory 1, a character generator, and a cathode ray tube (hereinafter referred to as CRT) 3. .

The code data sent from the channel is
The code is stored in the code memory 1 via the interface control section 4, read out periodically from the code memory 1, and sent to the character generator 2. Character generator 2 is character code
When it receives data, it converts it into a character pattern on the CRT and displays it on the CRT3.

Data displayed on a CRT3 is often a combination of characters, figures, and lines, but for example, as shown in Figure 2a, it is necessary to display the character ``A'' and the lines indicating its frame at the same time. , conventional, second
There is a method in which the line pattern shown in Figure b and the pattern of the character "A" shown in Figure 2 c are stored in separate areas of the character generator 2, and after reading each of them, they are combined and displayed on the CRT 3. It is used.

However, if the horizontal lines are treated the same as characters and graphics and stored separately, the memory capacity of the character generator 2 increases.

SUMMARY OF THE INVENTION An object of the present invention is to provide a cross-line display method that can display a combination of characters and graphics on a CRT without increasing the memory capacity of the character generator in order to eliminate such drawbacks.

The marker line display method according to the present invention is a character display device having a code memory that stores character codes and a character generator that converts the code data read from the code memory into a character pattern. A code conversion circuit is provided before the memory, converts each dot indicating a marker line into one bit for each line segment, and incorporates it into the marker line instruction code or character code.The code conversion circuit converts the incorporated character code into horizontal or vertical writing. After converting into one of the code assemblies, it is stored in the code memory, the character code read from the code memory is sent to the character generator, and the horizontal line bits are sent to the AND gate along with the corresponding raster output. The character generator is characterized in that the vertical line bits are outputted through the corresponding OR gates and displayed in synchronization with the character and graphic patterns from the character generator, while being input and expanded by a group of OR gates.

Embodiments of the present invention will be described below with reference to the drawings.

As a first example, as shown in FIG. 4b, in a vertical writing method in which data is displayed vertically,
A case where a cross-section line is displayed in combination with a character will be explained.

FIG. 3 is a bit configuration diagram of the code data of the present invention stored in the code memory of FIG. 1.

The code stored in code memory 2 is
As shown in the figure, 3 bits are added to the beginning of the character code CHCD: _b0 bit indicates the left vertical line LVL, _b1 bit indicates the upper horizontal line UHL, and _b2 bit indicates the right vertical line. Each RVL is converted into a bit.

Fig. 4a is a diagram showing the code data shown in Fig. 3 stored in the code memory, and Fig. 4b is a diagram showing the pattern displayed on the screen by the code memory of Fig. 4a. It is.

In the leftmost chord of “a” in Figure 4 a, b ₀ , b ₁ b ₂
Since each bit of is all 1, "A" is displayed surrounded by an upper horizontal line UHL, a left vertical line LVL, and a right vertical line RVL, as shown in the upper left of FIG. 4b.
In the code for “ka” stored next to “a”,
Since each bit of b ₀ , b ₁ , and b ₂ is all 0, "ka" is displayed as is to the right of "a" in FIG. 4b. In the same way, the end of the first line "n"
Until then, each bit of b ₀ , b ₁ , and b ₂ is all 0. In the following "i" code, each bit of b ₀ , b ₁ , and b ₂ is
101, "i" is displayed below "a" surrounded by a left vertical line LVL and a right vertical line RVL, as shown in FIG. 4b.

FIG. 5 is a diagram showing the principle of dot display of a combination of characters and ruled lines, and FIG. 6 is a diagram showing types of ruled line display.

One character is divided into 32 dots x 32 rasters, as shown in FIG. 5, for example, and characters and figures are displayed within this range. Among these, the dots that make up the characters are displayed as they are in the dot pattern stored in the character generator 2, and the upper horizontal line UHL is displayed in the scanning direction at the 0th raster for each character, and the horizontal lines are Vertical line LVL, RVL
is displayed at each 0th or 31st dot of the 0 to 31 rasters. Upper horizontal line UHL, left and right vertical lines LVL,
Each RVL is composed of 32 pixels, but each corresponds to 1 bit and is converted into 1 bit.

By combining the upper horizontal line UHL, left and right vertical lines LVL, and RVL, it is possible to display seven types of horizontal line patterns as shown in FIG. Arrow indicates scan direction
Shows SCN.

FIG. 7 is a block diagram showing a horizontal line display method for vertical writing according to the present invention.

Outputs b ₃ to _{b o} of code memory 1 are connected to character generator 2 to generate character patterns.
Generate G ₀ to G ₃₁ . On the other hand, code memory 1
Of the outputs, b ₀ to b ₂ bit outputs are connected to AND gate 8 or OR gate group R ₀ to R ₃₁ , respectively. That is, the b ₂ bit is connected to the input of R ₃₁ of the OR gates to generate the right vertical line RVL, and the b ₀ bit is connected to the input of R ₀ of the OR gates to generate the left vertical line LVL. occurs and also
b ₁ bit is ANDed with 0 raster signal (0RAS)
After being input to gate 8, it is connected to the inputs of OR gates _R0 to _R31 corresponding to each dot position on the 0 raster to generate an upper horizontal line UHL. In addition, the outputs G ₀ to G ₃₁ of the character generator 2 are also connected to the inputs of the OR gates R ₀ to R ₃₁ , and these outputs V ₀
~V ₃₁ corresponds to 32 dots of pixels for one character.

In this way, the lines are displayed in synchronization with the characters in accordance with the character code.

Next, as a second example, the data is shown in Figure 9b.
As shown in FIG. 2, a case will be described in which a horizontal writing method in which characters are displayed in the horizontal direction is displayed in combination with a horizontal line.

FIG. 8 is a diagram showing the bit configuration of data stored in the code memory.

A DFC (Define Field Character) code that determines the character of the field is placed at the beginning of one field, followed by a code of several characters.
CH/CD are consecutive. The DFC code and character code are distinguished by whether the _b0 bit is "1" or "0". In Figure 8, when the _b0 bit is “1”
This is a DFC code, and when it is "0" it is a character code.

The b ₁ bit of the DFC code is the upper horizontal line UHL
Converts the vertical line VL into bits, and b ₂ bits converts the vertical line VL into bits,
b ₃ bits is the lower horizontal line DHL converted into bits.

FIG. 9a is a diagram of the data storage state in the code memory, and FIG. 9b is a diagram showing a combination pattern displayed on the screen using the code of FIG. 9a.

To display the cross lines as shown in Figure 9b,
Input the data in code memory 1 as shown in FIG. 9a and refresh. For the DFC code located before the display character A, all bits b ₁ to _{b 3} are set to "1", for the DFC code located after the display character M, only the b ₂ bit is set to "1", and b ₁ , b ₃ Set the bit to "0".

Upper horizontal line UHL and lower horizontal line determined by DEC code
DHL is a rule line that extends to the entire field, and vertical line VL is a rule line that extends only to the first letter. Although the DFC code occupies the same area as one character in code memory 1, only the cross-line pattern is displayed on the screen and the character pattern is not displayed, so the vertical line in Figure 9b
There will be a space for one character between VL and character A.

In this way, horizontal lines are displayed around A, B, C...M.

FIG. 10a is a diagram showing the types of cross-line display, and FIG. 10b is a diagram showing the principle for displaying combinations of characters and cross-line as dots.

By combining the b ₁ , b ₂ , and b ₃ bits of the DFC code, seven types of grid line displays as shown in FIG. 10a are possible.

As shown in Figure 10b, one character consists of 32 dots
It is divided into 32 rasters, and the text and grid patterns are displayed within this range. For the dots that make up the characters, the dot pattern stored in the character generator 2 is displayed as is, and the upper horizontal line UHL is displayed in the scan direction at the 0th raster of each character, and the lower horizontal line is displayed as is. DHL is 31
The raster is displayed in the scan direction, and the vertical line VL is displayed at each 0th dot of rasters 0 to 31. The upper horizontal line UHL, the lower horizontal line DHL, and the vertical line VL each consist of 32 pixels, but each corresponds to 1 bit and is converted into 1 bit.

FIG. 11 is a block diagram showing a horizontal writing display system according to the present invention.

The output of the code memory 1 is connected to a character generator 2, which generates character patterns _G0 to _G31 . On the other hand, among the outputs of code memory 1
The outputs of ₃ bits b ₀ to b are sent to the holding circuits 7a to 7a, respectively.
Connected to 7c. That is, the _b0 bit is stored in the D-type flip-flops 9a,
The b1 bit is input to the trigger input of flip-flop 9b, and the _b1 bit is input to the 0 raster signal (0RAS) and an AND gate 10a whose outputs are respectively connected to the data input of flip-flop 9a. The ₃ bits b are input to the 31 raster signal (31RAS) and an AND gate 10b whose output is connected to the data input of flip-flop 9b.

b ₂ bits are b ₀ bits and AND gate 10c
connected to the input of

The outputs _G0 to G31 of the character generator 2, the outputs of the flip-flops 9a and _9b , and the output of the AND gate 10c are input to the inputs of the OR gate group _R0 to _R31 , which expand into pixels for 32 dots of one character. Connect. These or gate groups R ₀ ~
The output V ₀ to _{V 31} of R ₃₁ becomes 32 dots of pixels for one character.

In this case, when the _b0 bit is “1”,
Since it is a DFC code, the outputs G ₀ to _{G 31} of the character generator 2 are not generated. On the other hand, when the _b0 bit is "1", the flip-flop 9
A, 9b are held as 0 raster or 31 raster, respectively, and the pixels of V ₀ to V ₃₁ are output as upper horizontal line UHL and lower horizontal line DHL through OR gates R ₀ to R ₃₁ . b For ₂ bits, output the V ₀ pixel at the 0th dot located in the DFC code. Then, as shown in FIG. 9b, when moving to the next character code A, the holding circuits 7a and 7b are held, so the upper and lower horizontal lines UHL and DHL are output as pixels of _V0 to _V31 . The DFC code located next to the character code M in Figure 9b is ``1'' for only ₂ bits of b.
Therefore, holding circuits 7a and 7b are reset by the _b0 bit.

Next, as another example, a case will be described in which data for vertical writing display and horizontal writing display are treated the same.

Assembling a code in the vertical writing system as described in the first embodiment and assembling a code in the horizontal writing system as described in the second embodiment are completely different, and this is extremely troublesome for the user.

Therefore, by remembering only one code assembly method, for example, the horizontal writing method, when the vertical writing method is used, the code is automatically converted and the vertical writing line is displayed.

FIG. 12 is a block diagram of the code conversion system according to the present invention, and FIG. 13 shows the code converted from a horizontally written code to a vertically written code.
FIG. 2 is a code state diagram in memory.

When data to be displayed is inputted from the CPU, etc., it is stored in the data buffer 6, and further inputted to the code converter 5 controlled by a microcomputer, etc., to add a line display bit to the character code. etc., and then stored in the code memory 1.

For example, in order to display a combination of characters and contour lines as shown in FIG. 4b, by inputting the assembled code as shown in FIG. Converted to vertical writing code.

By the way, since CRTs scan horizontally,
Refreshing the code memory 1 also requires storing character codes in the order in which they are displayed horizontally.

In that case, when writing horizontally, the display direction and data order are the same when inputting data, so if you input it as is, it will match. However, when writing vertically, the refresh order of code memory 1 and the data flow are different, so the user
As shown in Figure 3a, the data is input to the data buffer 6 in the order of data flow and in horizontal writing code, and is converted by the code converter 5 into a refresh order, and also converted into a vertical writing code. As shown in FIG. 13b, the code is stored in the code memory 1. In other words, the input data is
DFC, character code A, I, U, horizontal line display
The DFC order is converted by the code converter 5 into the order of [character code ``A'' + crossed line display bit] and [character code ``KA''].
The lines and text are displayed vertically, as shown in .

As described above, according to the present invention, by converting the pixels of the cross-line to 1 bit, the cross-line can be displayed together with characters and figures without increasing the memory capacity of the character generator. In addition, it is extremely advantageous because it is possible to easily configure a circuit that converts each pixel of a horizontal line into 1 bit, and even when displaying vertically, it is possible to input horizontally written data without considering the refresh flow. .

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a character display device using a dot matrix, Fig. 2 is an explanatory diagram showing a conventional method of displaying characters and slash lines, and Fig. 3 is a bit configuration of a vertical writing code showing an embodiment of the present invention. Figure 4 is a state diagram of the code memory storing the code shown in Figure 3 and the display screen, Figure 5 is a principle diagram of vertical writing characters and marking line display, and Figure 6 is vertical writing marking line display. 7 is a block diagram showing a horizontal writing code display method according to an embodiment of the present invention. FIG. 8 is a bit configuration diagram of a horizontal writing code according to an embodiment of the present invention. Figure 9 is a state diagram of the code memory storing the code in Figure 8 and the display screen;
11 is a block diagram of a horizontal writing marking line display system showing an embodiment of the present invention. FIG.
The figure is a block diagram of the code conversion system of the present invention.
FIG. 13 is a state diagram when horizontal writing code is converted to vertical writing code using FIG. 12. 1: code memory, 2: character generator, 3: cathode ray tube, 4: interface control section, 5: code conversion section, 6: data buffer,
7a, 7b, 7c: holding circuit, 8: AND gate, 9a, 9b: flip-flop, 10a,
10b, 10c: AND gate, 0RAS, 3
1RAS: Raster output, R ₀ ~ R ₃₁ : OR gate,
G ₀ to G ₃₁ : Character pattern output, CH/PTN: Character pattern.

Claims (1)

[Scope of Claims] 1. A character display device having a code memory for storing a character code and a character generator for converting code data read from the code memory into a character pattern,
A code conversion circuit is provided before the memory, converts each dot indicating a marker line into one bit for each line segment, and incorporates it into the marker line instruction code or character code.The code conversion circuit converts the incorporated character code into horizontal or vertical writing. After converting into one of the code assemblies, it is stored in the code memory, and the character code read from the code memory is sent to the character generator, and the horizontal line bits are sent to the AND gate along with the corresponding raster output. , respectively, and are expanded by a group of OR gates, while outputting vertical line bits through the corresponding OR gates and displaying them in synchronization with the character and graphic patterns from the character generator. Display method. 2. The horizontal line bit read from the code memory is input to an AND gate together with the raster output, and then held by a holding circuit and expanded in the raster direction.
The method of displaying the lines as described in the section.