JPS6415949A - Semiconductor integrated circuit for audio amplification - Google Patents
Semiconductor integrated circuit for audio amplificationInfo
- Publication number
- JPS6415949A JPS6415949A JP62172247A JP17224787A JPS6415949A JP S6415949 A JPS6415949 A JP S6415949A JP 62172247 A JP62172247 A JP 62172247A JP 17224787 A JP17224787 A JP 17224787A JP S6415949 A JPS6415949 A JP S6415949A
- Authority
- JP
- Japan
- Prior art keywords
- ground
- amplifier section
- circuit
- section
- ground wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/547—Dispositions of multiple bond wires
- H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
PURPOSE:To improve the distortion rate characteristic and oscillation stability by making the ground wirings on an IC substrate independent in the first-stage amplifier section, the output amplifier section and other circuit sections, respectively, thereby minimizing the inter-circuit effect. CONSTITUTION:The ground wirings of an IC are divided into the input circuit side including the first-stage amplifier section on the IC substrate and the output amplifier section, and the ground wirings at the input circuit side are divided into a first ground wiring 2 connected only to the first-stage amplifier section 1 and a second ground wiring 5 connected to other small signal system circuit section 3 and a subextraction circuit section 4 at the input circuit side. The first ground wiring 2 and the second ground wiring 5 are respectively connected to different ground pads 6, 7, and commonly connected to one lead frame 10 via bonding wires 8, 9. Since the ground wiring 2 connected to the first-stage amplifier section 1 and the ground wiring 5 are isolated, the ground of the first-stage amplifier section 1 does not rise because of the current of the small signal system circuit section 3 and the voltage drop related to the subextraction circuit 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62172247A JPS6415949A (en) | 1987-07-10 | 1987-07-10 | Semiconductor integrated circuit for audio amplification |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62172247A JPS6415949A (en) | 1987-07-10 | 1987-07-10 | Semiconductor integrated circuit for audio amplification |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6415949A true JPS6415949A (en) | 1989-01-19 |
Family
ID=15938348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62172247A Pending JPS6415949A (en) | 1987-07-10 | 1987-07-10 | Semiconductor integrated circuit for audio amplification |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6415949A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0905776A1 (en) * | 1997-09-29 | 1999-03-31 | STMicroelectronics SA | Semiconductor device comprising two ground contact pads connected to a ground connection lead and testing procedure for the device |
-
1987
- 1987-07-10 JP JP62172247A patent/JPS6415949A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0905776A1 (en) * | 1997-09-29 | 1999-03-31 | STMicroelectronics SA | Semiconductor device comprising two ground contact pads connected to a ground connection lead and testing procedure for the device |
| FR2769131A1 (en) * | 1997-09-29 | 1999-04-02 | St Microelectronics Sa | SEMICONDUCTOR DEVICE HAVING TWO GROUND CONNECTION POINTS CONNECTED TO A GROUND CONNECTION LEG AND METHOD FOR TESTING SUCH A DEVICE |
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