JPS642331A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS642331A
JPS642331A JP62158226A JP15822687A JPS642331A JP S642331 A JPS642331 A JP S642331A JP 62158226 A JP62158226 A JP 62158226A JP 15822687 A JP15822687 A JP 15822687A JP S642331 A JPS642331 A JP S642331A
Authority
JP
Japan
Prior art keywords
chips
resin
electrodes
wiring
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62158226A
Other languages
Japanese (ja)
Other versions
JPH012331A (en
JPH084101B2 (en
Inventor
Hiroaki Fujimoto
Kenzo Hatada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62158226A priority Critical patent/JPH084101B2/en
Publication of JPS642331A publication Critical patent/JPS642331A/en
Publication of JPH012331A publication Critical patent/JPH012331A/en
Publication of JPH084101B2 publication Critical patent/JPH084101B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To improve the yield and the reliability by a method wherein connecting resin is formed by spin-coating a semiconductor wafer and then divided into LSI chips to be fixed and connected to a wiring substrate by the connecting resin on the LSI chips.
CONSTITUTION: The surface of a semiconductor wafer 1 with electrodes 2 is spin-coated with connected resin 3. As the resin 3 epoxy, acryl, etc., are used in the case of thermosetting or ultraviolet ray setting while polyurethane or FEP is used in the case of applying themoformability. First, the wafer 1 is cut and divided to obtain LSI chips 1' containing the resin 3. Second, a conductor wiring 5 of a wiring substrate 4 is aligned with the electrodes 2 and then the chips 1' are arranged on the substrate 4. Third, when the chips 1' are pressurized with a processing tool 6, the resin 3 is pushed out around the electrodes 2 of chips 1' to be electrically connected to the wiring 5. Finally, the resin 3 as it is pressurized starts setting and then the tool 6 is released. Through these procedures, the chips 1' can be fixed to the substrate 4 enabling the electrodes 2 of chips 1' and the wiring 5 to be electrically connected to each other.
COPYRIGHT: (C)1989,JPO&Japio
JP62158226A 1987-06-25 1987-06-25 Method for manufacturing semiconductor device Expired - Fee Related JPH084101B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62158226A JPH084101B2 (en) 1987-06-25 1987-06-25 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62158226A JPH084101B2 (en) 1987-06-25 1987-06-25 Method for manufacturing semiconductor device

Publications (3)

Publication Number Publication Date
JPS642331A true JPS642331A (en) 1989-01-06
JPH012331A JPH012331A (en) 1989-01-06
JPH084101B2 JPH084101B2 (en) 1996-01-17

Family

ID=15667035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62158226A Expired - Fee Related JPH084101B2 (en) 1987-06-25 1987-06-25 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH084101B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0452615A (en) * 1990-06-20 1992-02-20 Asahi Optical Co Ltd Finder optical system
US5811317A (en) * 1995-08-25 1998-09-22 Texas Instruments Incorporated Process for reflow bonding a semiconductor die to a substrate and the product produced by the product
US5846853A (en) * 1991-12-11 1998-12-08 Mitsubishi Denki Kabushiki Kaisha Process for bonding circuit substrates using conductive particles and back side exposure
US6037552A (en) * 1997-10-24 2000-03-14 Nec Corporation See-saw button device for electronic equipment
JP2001093940A (en) * 1999-09-21 2001-04-06 Sumitomo Bakelite Co Ltd Method for assembling semiconductor device
JP2003082197A (en) * 2001-09-17 2003-03-19 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195837A (en) * 1983-04-21 1984-11-07 Sharp Corp Chip bonding method for large-scale integrated circuit
JPS60262430A (en) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS61194732A (en) * 1985-02-22 1986-08-29 Casio Comput Co Ltd Method for jointing semiconductor pellet and substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195837A (en) * 1983-04-21 1984-11-07 Sharp Corp Chip bonding method for large-scale integrated circuit
JPS60262430A (en) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS61194732A (en) * 1985-02-22 1986-08-29 Casio Comput Co Ltd Method for jointing semiconductor pellet and substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0452615A (en) * 1990-06-20 1992-02-20 Asahi Optical Co Ltd Finder optical system
US5846853A (en) * 1991-12-11 1998-12-08 Mitsubishi Denki Kabushiki Kaisha Process for bonding circuit substrates using conductive particles and back side exposure
US5811317A (en) * 1995-08-25 1998-09-22 Texas Instruments Incorporated Process for reflow bonding a semiconductor die to a substrate and the product produced by the product
US6037552A (en) * 1997-10-24 2000-03-14 Nec Corporation See-saw button device for electronic equipment
JP2001093940A (en) * 1999-09-21 2001-04-06 Sumitomo Bakelite Co Ltd Method for assembling semiconductor device
JP2003082197A (en) * 2001-09-17 2003-03-19 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device

Also Published As

Publication number Publication date
JPH084101B2 (en) 1996-01-17

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees