JPS642361A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS642361A
JPS642361A JP62158281A JP15828187A JPS642361A JP S642361 A JPS642361 A JP S642361A JP 62158281 A JP62158281 A JP 62158281A JP 15828187 A JP15828187 A JP 15828187A JP S642361 A JPS642361 A JP S642361A
Authority
JP
Japan
Prior art keywords
film
type
base region
impurity
internal base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62158281A
Other languages
Japanese (ja)
Other versions
JPH012361A (en
JPH0831468B2 (en
Inventor
Kiyoshi Irino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62158281A priority Critical patent/JPH0831468B2/en
Publication of JPS642361A publication Critical patent/JPS642361A/en
Publication of JPH012361A publication Critical patent/JPH012361A/en
Publication of JPH0831468B2 publication Critical patent/JPH0831468B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To improve the reliability of a transistor, and to enhance yield on production by diffusing an impurity from a film containing the impurity to the side face of a stepped section formed when a window is bored and connecting an external base and an internal base in the manufacture of a semiconductor device.
CONSTITUTION: An n-type buried layer is thermally diffused to a p-type silicon substrate, an n-type epitaxial layer is grown, an n-type collector region 3 is set, and a field insulating film 2 is shaped through selective oxidation. Boron is implanted to the top face of the field insulating film 2, and a p-type polycrystalline silicon film 4 (a base leading-out electrode) is formed. An SiO2 film 8 is applied onto the top face of the film 4, an external base region 5 is demarcated through beat treatment, the film 8, 4 on an internal base region are reacted by a chlorine gas, and a window W is bored. A boron organic film 20 is etched vertically at that time, an SiO2 film 10 is applied onto the film 20 left on the side face of the stepped section of the film W. Ions for shaping the internal base region are implanted, the internal base region is formed through heat treatment, and an impurity is diffused simultaneously to the stepped section from the film 20.
COPYRIGHT: (C)1989,JPO&Japio
JP62158281A 1987-06-24 1987-06-24 Method for manufacturing semiconductor device Expired - Fee Related JPH0831468B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62158281A JPH0831468B2 (en) 1987-06-24 1987-06-24 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62158281A JPH0831468B2 (en) 1987-06-24 1987-06-24 Method for manufacturing semiconductor device

Publications (3)

Publication Number Publication Date
JPS642361A true JPS642361A (en) 1989-01-06
JPH012361A JPH012361A (en) 1989-01-06
JPH0831468B2 JPH0831468B2 (en) 1996-03-27

Family

ID=15668169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62158281A Expired - Fee Related JPH0831468B2 (en) 1987-06-24 1987-06-24 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0831468B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758120A (en) * 1993-08-11 1995-03-03 Nec Corp Semiconductor device and manufacturing method thereof
WO1999052138A1 (en) * 1998-04-08 1999-10-14 Aeroflex Utmc Microelectronic Systems Inc. A bipolar transistor having low extrinsic base resistance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758120A (en) * 1993-08-11 1995-03-03 Nec Corp Semiconductor device and manufacturing method thereof
WO1999052138A1 (en) * 1998-04-08 1999-10-14 Aeroflex Utmc Microelectronic Systems Inc. A bipolar transistor having low extrinsic base resistance

Also Published As

Publication number Publication date
JPH0831468B2 (en) 1996-03-27

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees