JPS6425565A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6425565A
JPS6425565A JP62182516A JP18251687A JPS6425565A JP S6425565 A JPS6425565 A JP S6425565A JP 62182516 A JP62182516 A JP 62182516A JP 18251687 A JP18251687 A JP 18251687A JP S6425565 A JPS6425565 A JP S6425565A
Authority
JP
Japan
Prior art keywords
layer
type
forming
insulating
mesa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62182516A
Other languages
Japanese (ja)
Inventor
Soichi Kimura
Atsushi Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62182516A priority Critical patent/JPS6425565A/en
Publication of JPS6425565A publication Critical patent/JPS6425565A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the junction capacitance between a base and a collector and to make it possible to perform high speed operation, by sequentially forming a first- conductivity type first layer, a second-conductivity type second layer and a first- conductivity type third layer, selectively etching the third layer in an inverted taper shape, forming a mesa having an overhang part, forming a semi-insulating fourth layer selectively on the side surface, and forming an ohmic electrode for each layer. CONSTITUTION:On a semi-insulating InP substrate 1, an N-type InP layer 2, a P-type InGaAsP layer 3 and an N-type InP layer 4 are sequentially grown by an epitaxial method. An insulating film 10 is selectively formed by an ordinary insulating film step, a photolithography step and an etching step. With the film as a mask, the N-type InP layer 4 is etched to the intermediate part. The etching shape is made to be an inverted taper shape. An overhang part 11 is formed, and a mesa is formed. Then, a semi-insulating InP layer is formed on the side surface of the mesa by mass transport. Thereafter, Au and Zn are evaporated on the entire surface as a base electrode. The insulating film 10 is removed by a lift-off step. A base electrode 8 is formed only on the P-type InGaAsP layer 3. Thus, the interval between the N-type InP layer 4 and the base electrode 8 can be made very short.
JP62182516A 1987-07-22 1987-07-22 Semiconductor device and manufacture thereof Pending JPS6425565A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62182516A JPS6425565A (en) 1987-07-22 1987-07-22 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62182516A JPS6425565A (en) 1987-07-22 1987-07-22 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6425565A true JPS6425565A (en) 1989-01-27

Family

ID=16119665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62182516A Pending JPS6425565A (en) 1987-07-22 1987-07-22 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6425565A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0290626A (en) * 1988-09-28 1990-03-30 Nec Corp Manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0290626A (en) * 1988-09-28 1990-03-30 Nec Corp Manufacturing method of semiconductor device

Similar Documents

Publication Publication Date Title
GB1404996A (en) Transistor
JPS5681994A (en) Field effect type semiconductor laser and manufacture thereof
GB2079048A (en) A semiconductor device and a process for the production thereof
US4967254A (en) Semiconductor device
US4644381A (en) I2 L heterostructure bipolar transistors and method of making the same
US5739062A (en) Method of making bipolar transistor
JPS6425565A (en) Semiconductor device and manufacture thereof
JPS5572083A (en) Semiconductor photo-detector
JPS57197862A (en) Active semiconductor device and manufacture thereof
JPS6451658A (en) Semiconductor device
US4745085A (en) Method of making I2 L heterostructure bipolar transistors
JPS57208174A (en) Semiconductor device
JPS5618484A (en) Manufacture of semiconductor laser
KR900001397B1 (en) Gas tetero junction field elfect transistor
JPS5561078A (en) Manufacture of guard ring-fitted photodiode
JPS6459956A (en) Heterostructure bipolar transistor and manufacture thereof
JPH02110938A (en) Manufacture of heterojunction bipolar transistor
JPS5642390A (en) Formation of electrode on semiconductor device
JPS6461018A (en) Manufacture of semiconductor device
JPS60213067A (en) Manufacture of semiconductor device
JPS57184273A (en) Semiconductor laser device
JPS54146974A (en) Production of schottky field effect transistor
JPS57128987A (en) Semiconductor device and its manufacture
JPS5748286A (en) Manufacture of buried hetero structured semiconductor laser
JPS5732684A (en) Manufacture of semiconductor device