JPS6426963A - Bus arbitrating system - Google Patents
Bus arbitrating systemInfo
- Publication number
- JPS6426963A JPS6426963A JP18459987A JP18459987A JPS6426963A JP S6426963 A JPS6426963 A JP S6426963A JP 18459987 A JP18459987 A JP 18459987A JP 18459987 A JP18459987 A JP 18459987A JP S6426963 A JPS6426963 A JP S6426963A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- line
- circuit
- signal
- main body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
- G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
PURPOSE:To ensure the bus arbitration accordant with the number of bus masters incorporated by propagating the bus control right signal held in a bus master to another bus master of the next stage when no bus request signal is received any more from a bus master main body. CONSTITUTION:When a bus master main body 11 of a bus master 10 wants to use a common bus 40, a bus request signal 13 is turned on and the main body 11 waits for an ON state of a bus request answer signal line 14. A bus arbitrating circuit 12 receives a bus control right signal through a bus control right signal line 3 after the line 14 is turned on. Then the circuit 12 turns on the line 14 in the timing of its own and at the same time holds the transmission of the bus control signal to a bus arbitrating circuit 22 of the next stage. The bus master main body 11 starts the use of a common bus 40 and turns off the line 13 when the use of the line 40 is over. The circuit 12 transmits the bus control right signal to the circuit 22 when the line 13 is turned off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18459987A JPS6426963A (en) | 1987-07-23 | 1987-07-23 | Bus arbitrating system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18459987A JPS6426963A (en) | 1987-07-23 | 1987-07-23 | Bus arbitrating system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6426963A true JPS6426963A (en) | 1989-01-30 |
Family
ID=16156029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18459987A Pending JPS6426963A (en) | 1987-07-23 | 1987-07-23 | Bus arbitrating system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6426963A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0427703A1 (en) * | 1989-11-07 | 1991-05-15 | Alcatel Austria Aktiengesellschaft | Decentralised access control to a common data bus |
-
1987
- 1987-07-23 JP JP18459987A patent/JPS6426963A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0427703A1 (en) * | 1989-11-07 | 1991-05-15 | Alcatel Austria Aktiengesellschaft | Decentralised access control to a common data bus |
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