JPS6454547A - Information processor with program trace function - Google Patents
Information processor with program trace functionInfo
- Publication number
- JPS6454547A JPS6454547A JP62211845A JP21184587A JPS6454547A JP S6454547 A JPS6454547 A JP S6454547A JP 62211845 A JP62211845 A JP 62211845A JP 21184587 A JP21184587 A JP 21184587A JP S6454547 A JPS6454547 A JP S6454547A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- cpu
- trace
- program
- buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003247 decreasing effect Effects 0.000 abstract 2
- 238000012544 monitoring process Methods 0.000 abstract 2
- 239000000700 radioactive tracer Substances 0.000 abstract 2
- 230000007423 decrease Effects 0.000 abstract 1
Landscapes
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To execute the program trace without decreasing remarkably a processing speed of a CPU by a buffer memory of a small capacity, by providing a tracer consisting of a buffer monitoring circuit, a buffer memory, and a trace memory. CONSTITUTION:When the execution of a microprogram is started, a tracer 3 starts simultaneously its operation, and a buffer memory 5 inputs an address and a data which are brought to access to a main memory 2 through a bus 100 by a CPU 1. Subsequently, they are outputted to a trace memory 6, but in case when the stagnation of the data of the memory 5 has exceeded a prescribed quantity, a buffer monitoring circuit 7 detects it, and outputs a microprogram inhibit signal 101. As a result, an AND circuit 10 inhibits an output of a ready signal 104 to the CPU 1, and the CPU 1 stops executing the program. Subsequently, when the stagnation of the data of the memory 5 decreases from the prescribed value, the circuit 7 stops outputting the signal 101, and the CPU 1 restarts to execute the program, therefore, the trace can be executed without decreasing remarkably the processing speed by a buffer memory of a small capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62211845A JPS6454547A (en) | 1987-08-25 | 1987-08-25 | Information processor with program trace function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62211845A JPS6454547A (en) | 1987-08-25 | 1987-08-25 | Information processor with program trace function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6454547A true JPS6454547A (en) | 1989-03-02 |
Family
ID=16612540
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62211845A Pending JPS6454547A (en) | 1987-08-25 | 1987-08-25 | Information processor with program trace function |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6454547A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19834191C2 (en) * | 1997-07-29 | 2002-01-03 | Nec Corp Tokio Tokyo | Integrated circuit device and its control method |
| WO2009133354A3 (en) * | 2008-04-28 | 2009-12-23 | Imagination Technologies Limited | System for providing trace data in a data processor having a pipelined architecture |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58107952A (en) * | 1981-12-22 | 1983-06-27 | Fujitsu Ltd | Buffer memory controlling system |
| JPS6020250A (en) * | 1983-07-15 | 1985-02-01 | Fujitsu Ltd | Program delay tracing system |
| JPS60179837A (en) * | 1984-02-28 | 1985-09-13 | Toshiba Audio Video Eng Corp | Buffer circuit of receiving data |
| JPS61283952A (en) * | 1985-06-10 | 1986-12-13 | Mitsubishi Electric Corp | Data transfer instrument |
-
1987
- 1987-08-25 JP JP62211845A patent/JPS6454547A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58107952A (en) * | 1981-12-22 | 1983-06-27 | Fujitsu Ltd | Buffer memory controlling system |
| JPS6020250A (en) * | 1983-07-15 | 1985-02-01 | Fujitsu Ltd | Program delay tracing system |
| JPS60179837A (en) * | 1984-02-28 | 1985-09-13 | Toshiba Audio Video Eng Corp | Buffer circuit of receiving data |
| JPS61283952A (en) * | 1985-06-10 | 1986-12-13 | Mitsubishi Electric Corp | Data transfer instrument |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19834191C2 (en) * | 1997-07-29 | 2002-01-03 | Nec Corp Tokio Tokyo | Integrated circuit device and its control method |
| US6421795B2 (en) | 1997-07-29 | 2002-07-16 | Nec Corporation | Integrated circuit device and its control method |
| WO2009133354A3 (en) * | 2008-04-28 | 2009-12-23 | Imagination Technologies Limited | System for providing trace data in a data processor having a pipelined architecture |
| JP2011519100A (en) * | 2008-04-28 | 2011-06-30 | イマジネイション テクノロジーズ リミテッド | System for providing trace data in a data processor having a pipelined architecture |
| US8775875B2 (en) | 2008-04-28 | 2014-07-08 | Imagination Technologies, Limited | System for providing trace data in a data processor having a pipelined architecture |
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