JPS645895Y2 - - Google Patents

Info

Publication number
JPS645895Y2
JPS645895Y2 JP1983203897U JP20389783U JPS645895Y2 JP S645895 Y2 JPS645895 Y2 JP S645895Y2 JP 1983203897 U JP1983203897 U JP 1983203897U JP 20389783 U JP20389783 U JP 20389783U JP S645895 Y2 JPS645895 Y2 JP S645895Y2
Authority
JP
Japan
Prior art keywords
heat sink
integrated circuit
hybrid integrated
recess
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1983203897U
Other languages
Japanese (ja)
Other versions
JPS60109332U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1983203897U priority Critical patent/JPS60109332U/en
Publication of JPS60109332U publication Critical patent/JPS60109332U/en
Application granted granted Critical
Publication of JPS645895Y2 publication Critical patent/JPS645895Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10166—Transistor

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)

Description

【考案の詳細な説明】 (1) 考案の技術分野 本考案は放熱効果のすぐれた高電力混成集積回
路装置に関する。
[Detailed Description of the Invention] (1) Technical Field of the Invention The present invention relates to a high power hybrid integrated circuit device with excellent heat dissipation effects.

(2) 技術の背景 従来の混成集積回路素子は比較的低電力レベル
の分野に多く用いられていたために、その放熱等
については特別に配慮はなされていなかつた。し
かし電源回路、各種モータの制御回路、電力増幅
回路等の高電力レベルの分野にも混成集積回路素
子が多く使用されるようになるに伴つて、その放
熱構造が問題になり高密度実装に適した放熱構造
の開発が要求されるようになつてきた。
(2) Background of the technology Since conventional hybrid integrated circuit elements have been used in many fields with relatively low power levels, no special consideration has been given to their heat dissipation. However, as hybrid integrated circuit elements are increasingly used in high-power fields such as power supply circuits, control circuits for various motors, and power amplifier circuits, their heat dissipation structure has become a problem, making them unsuitable for high-density packaging. There is a growing demand for the development of heat dissipation structures.

(3) 従来技術と問題点 第1図は従来の高電力混成回路における放熱構
造である。発熱の大きい電子部品例えばパワート
ランジスタ1を搭載したサブ基板2を銅またはア
ルミニウム製のブロツク3に接着して、さらに基
板4に接着する方法が採られている。
(3) Prior art and problems Figure 1 shows the heat dissipation structure of a conventional high power hybrid circuit. A method is adopted in which a sub-board 2 on which electronic components that generate a large amount of heat, such as a power transistor 1, is mounted is bonded to a block 3 made of copper or aluminum, and then bonded to a substrate 4.

しかしながら複数個の高電力半導体素子を同一
の基板4に取りつける場合、各々の半導体が占め
る面積を充分大きく取つておかなければ、基板4
を通して各々の半導体の間に熱干渉が生じ各々の
半導体チツプの温度が上昇する等の問題があり高
密度実装ができない。
However, when attaching multiple high-power semiconductor devices to the same substrate 4, the area occupied by each semiconductor must be set sufficiently large.
High-density packaging is not possible due to problems such as thermal interference occurring between the respective semiconductors through the semiconductor chip and the temperature of each semiconductor chip rising.

また第2図に示すようにアルミニウム板5とエ
ポキシ樹脂6と銅板7を張り合せた高熱伝導性基
板を使用することもあるがこの場合絶縁層(エポ
キシ)のため熱抵抗はそれ程低くならないという
問題がある。
Also, as shown in Figure 2, a highly thermally conductive substrate made by laminating an aluminum plate 5, an epoxy resin 6, and a copper plate 7 is sometimes used, but in this case, the problem is that the thermal resistance is not so low because of the insulating layer (epoxy). There is.

(4) 考案の目的 (4) 考案の目的 本考案の目的は上記従来の問題点を解決し、通
常パツケージとは別に使用されるヒートシンク自
体に混成集積回路を組込み、そしてケース本体の
高い放熱特性を十分活すように発熱部品から本体
までの熱径路を単純化して低い熱抵抗構造を実現
するものである。
(4) Purpose of the invention (4) Purpose of the invention The purpose of the invention is to solve the above conventional problems, incorporate a hybrid integrated circuit into the heat sink itself, which is normally used separately from the package, and improve the heat dissipation properties of the case body. The heat path from the heat-generating parts to the main body is simplified to make full use of the heat, and a low thermal resistance structure is realized.

(5) 考案の構成 上記目的は本考案によれば外部フイン状部を有
し、混成集積回路を内部に収容する凹部が設けら
れ、その表面が表面銅化処理されたアルミニウム
製ヒートシンクと、 表面側に電子部品を搭載し、裏面に金属層が印
刷形成され、該ヒートシンクの凹部内表面に半田
接着されるセラミツク回路基板と、 該回路基板上に搭載された高電力レベルの半導
体素子を含む電子部品と、 該電子部品を該ヒートシンクの凹部内に気密封
止するフタ部とを有する事を特徴とする混成集積
回路装置により達成される。
(5) Structure of the invention According to the invention, the above purpose is to provide an aluminum heat sink having an external fin-like part, a recess for accommodating a hybrid integrated circuit therein, and a surface of which is copperized; A ceramic circuit board with electronic components mounted on the side, a metal layer printed on the back side, and soldered to the inner surface of the recess of the heat sink; This is achieved by a hybrid integrated circuit device comprising: a component; and a lid portion that hermetically seals the electronic component within a recess of the heat sink.

(6) 考案の実施例 次に図面により本考案を具体的に説明する。(6) Example of implementation of the idea Next, the present invention will be specifically explained with reference to the drawings.

第3図は本考案の実施例による混成集積回路装
置の断面図を示す。
FIG. 3 shows a cross-sectional view of a hybrid integrated circuit device according to an embodiment of the present invention.

ヒートシンク8本体に凹部を設け、その内部に
混成集積回路を収容している。発熱の大きいパワ
ートランジスタ1は半田付けによりアルミナ基板
9に接着されさらにアルミナ基板の裏面に銀パラ
系厚膜ペーストを印刷して金属層を形成して、こ
れを銅化処理を施したアルミニウムヒートシンク
表面に半田付けする。その他の電子部品10,1
1も同様にアルミニウムヒートシンク表面に半田
付けされる。なお表面銅化処理はアルミニウム表
面に熱化学的に銅をアルミニウム中に拡散させ、
さらに表面に銅メツキして行われる。フタ12を
同様に半田付けでケース8のシール部に接続して
気密封止する。フタとしては、例えば、アルミニ
ウム板に表面銅化処理したもの等を用いることが
できる。
A recess is provided in the main body of the heat sink 8, and a hybrid integrated circuit is housed inside the recess. The power transistor 1, which generates a large amount of heat, is bonded to an alumina substrate 9 by soldering, and a metal layer is formed by printing a silver para-based thick film paste on the back side of the alumina substrate, which is then coated on the surface of an aluminum heat sink. solder to. Other electronic parts 10,1
1 is similarly soldered to the surface of the aluminum heat sink. Surface copperization treatment involves thermochemically diffusing copper into the aluminum surface.
The surface is then plated with copper. Similarly, the lid 12 is connected to the seal portion of the case 8 by soldering and hermetically sealed. As the lid, for example, an aluminum plate whose surface is copperized can be used.

(7) 考案の効果 以上説明したように本考案の混成集積回路装置
ではアルミナ基板と、ケースを兼ねたヒートシン
ク本体とが直接半田付けできるので低い熱抵抗が
実現できるという利点がある。
(7) Effects of the invention As explained above, the hybrid integrated circuit device of the invention has the advantage of achieving low thermal resistance because the alumina substrate and the heat sink body, which also serves as a case, can be directly soldered.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は従来の混成集積回路の放
熱構造の説明図、第3図は本発明の実施例による
混成集積回路装置の断面図を示す。 図において1はパワートランジスタ、8はヒー
トシンク(ケース)、9はアルミナ基板、12は
フタを示す。
1 and 2 are explanatory diagrams of a conventional heat dissipation structure of a hybrid integrated circuit, and FIG. 3 is a sectional view of a hybrid integrated circuit device according to an embodiment of the present invention. In the figure, 1 is a power transistor, 8 is a heat sink (case), 9 is an alumina substrate, and 12 is a lid.

Claims (1)

【実用新案登録請求の範囲】 外部フイン状部を有し、混成集積回路を内部に
収容する凹部が設けられ、その表面が表面銅化処
理されたアルミニウム製ヒートシンクと、 表面側に電子部品を搭載し、裏面に金属層が印
刷形成され、該ヒートシンクの凹部内表面に半田
接着されるセラミツク回路基板と、 該回路基板上に搭載された高電力レベルの半導
体素子を含む電子部品とを有し、 該電子部品を該ヒートシンクの凹部内に気密封
止するフタ部とを有することを特徴とする混成集
積回路。
[Scope of Claim for Utility Model Registration] An aluminum heat sink having an external fin-like part and a recessed part for accommodating a hybrid integrated circuit inside, the surface of which is copperized, and electronic components mounted on the surface side. a ceramic circuit board on which a metal layer is printed on the back surface and soldered to the inner surface of the recess of the heat sink; and an electronic component including a high power level semiconductor element mounted on the circuit board. 1. A hybrid integrated circuit comprising: a lid portion for hermetically sealing the electronic component within the recess of the heat sink.
JP1983203897U 1983-12-27 1983-12-27 Hybrid integrated circuit device Granted JPS60109332U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983203897U JPS60109332U (en) 1983-12-27 1983-12-27 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983203897U JPS60109332U (en) 1983-12-27 1983-12-27 Hybrid integrated circuit device

Publications (2)

Publication Number Publication Date
JPS60109332U JPS60109332U (en) 1985-07-25
JPS645895Y2 true JPS645895Y2 (en) 1989-02-14

Family

ID=30766301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983203897U Granted JPS60109332U (en) 1983-12-27 1983-12-27 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS60109332U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11264299B1 (en) * 2020-09-03 2022-03-01 Northrop Grumman Systems Corporation Direct write, high conductivity MMIC attach

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730316B2 (en) * 1973-03-23 1982-06-28
JPS587645Y2 (en) * 1976-03-23 1983-02-10 日本電気ホームエレクトロニクス株式会社 semiconductor equipment
JPS58173855A (en) * 1982-04-02 1983-10-12 Mitsubishi Electric Corp Cooling device for semiconductor element

Also Published As

Publication number Publication date
JPS60109332U (en) 1985-07-25

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