JPS6467627A - Pipeline control system - Google Patents

Pipeline control system

Info

Publication number
JPS6467627A
JPS6467627A JP62224183A JP22418387A JPS6467627A JP S6467627 A JPS6467627 A JP S6467627A JP 62224183 A JP62224183 A JP 62224183A JP 22418387 A JP22418387 A JP 22418387A JP S6467627 A JPS6467627 A JP S6467627A
Authority
JP
Japan
Prior art keywords
flow
state
instruction
shorten
stv signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62224183A
Other languages
Japanese (ja)
Other versions
JP2511063B2 (en
Inventor
Fumio Matsunoshita
Yoshihiro Mizushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62224183A priority Critical patent/JP2511063B2/en
Publication of JPS6467627A publication Critical patent/JPS6467627A/en
Application granted granted Critical
Publication of JP2511063B2 publication Critical patent/JP2511063B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To shorten the machine cycle and to perform the pipeline processing at a high speed by interlocking a 1st flow in a pipeline process with no direct use of an STV signal and bypassing a 2nd flow to the 1st flow when an instruction extracting exception is detected. CONSTITUTION:In case of an SS (storage-and-storage) type instruction, a 1st flow is interlocked to a state following a state D by one or more states and also preceding a state E regardless of an instruction buffer valid signal (STV signal). Then the interlock of the 1st flow is released by the STV signal when an instruction extracting exception is detected after execution of a 2nd flow. Thus the 2nd flow is bypassed to the state E of the 1st flow or to a state preceding the state E. Thus it is possible to shorten the machine cycle and to perform the pipeline processing at a high speed.
JP62224183A 1987-09-09 1987-09-09 Pipeline control method Expired - Fee Related JP2511063B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62224183A JP2511063B2 (en) 1987-09-09 1987-09-09 Pipeline control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62224183A JP2511063B2 (en) 1987-09-09 1987-09-09 Pipeline control method

Publications (2)

Publication Number Publication Date
JPS6467627A true JPS6467627A (en) 1989-03-14
JP2511063B2 JP2511063B2 (en) 1996-06-26

Family

ID=16809825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62224183A Expired - Fee Related JP2511063B2 (en) 1987-09-09 1987-09-09 Pipeline control method

Country Status (1)

Country Link
JP (1) JP2511063B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223874A (en) * 1990-11-09 1993-06-29 Asahi Kogaku Kogyo Kabushiki Kaisha Pentagonal mirror unit of single lens reflex camera

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223874A (en) * 1990-11-09 1993-06-29 Asahi Kogaku Kogyo Kabushiki Kaisha Pentagonal mirror unit of single lens reflex camera

Also Published As

Publication number Publication date
JP2511063B2 (en) 1996-06-26

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Legal Events

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