JPS6472648A - Communication terminal adapter equipment - Google Patents

Communication terminal adapter equipment

Info

Publication number
JPS6472648A
JPS6472648A JP62228390A JP22839087A JPS6472648A JP S6472648 A JPS6472648 A JP S6472648A JP 62228390 A JP62228390 A JP 62228390A JP 22839087 A JP22839087 A JP 22839087A JP S6472648 A JPS6472648 A JP S6472648A
Authority
JP
Japan
Prior art keywords
terminal
speed
communication
data
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62228390A
Other languages
Japanese (ja)
Other versions
JPH0620208B2 (en
Inventor
Kiyoshi Abe
Kiyoshi Tani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62228390A priority Critical patent/JPH0620208B2/en
Publication of JPS6472648A publication Critical patent/JPS6472648A/en
Publication of JPH0620208B2 publication Critical patent/JPH0620208B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To easily accommodate a high-speed data terminal without unnecessarily making faster the call control circuit of a communication terminal adapter and the processing capacity of a CPU by making slower the communication speed between the terminal at the time of the call control, when the call control procedure between the high-speed data terminal is supported. CONSTITUTION:A man-machine interface circuit 18 sets the communication speed and the communication attribute of the terminal. The action mode of a general transmitting/receiving circuit 19 for synchronous/asynchronous communication is selected by information set in this way using the firmware of a CPU 20. After the establishment of the call control procedure, a communication data speed converting circuit 25 converts the terminal data speed when the terminal communicates with a host exchange through a transmission line interface circuit 23, and a received data selecting circuit 21 is switched through the general transmitting/receiving circuit 19 for synchronous/asynchronous communication when the high-speed processing of the control data is made unnecessary, and switched with the data receiving mode from the host exchange. Thus, the accommodation of the terminal in a wide range from the asynchronous terminal to the high-speed synchronous terminal is attained.
JP62228390A 1987-09-14 1987-09-14 Communication terminal adapter device Expired - Lifetime JPH0620208B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62228390A JPH0620208B2 (en) 1987-09-14 1987-09-14 Communication terminal adapter device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62228390A JPH0620208B2 (en) 1987-09-14 1987-09-14 Communication terminal adapter device

Publications (2)

Publication Number Publication Date
JPS6472648A true JPS6472648A (en) 1989-03-17
JPH0620208B2 JPH0620208B2 (en) 1994-03-16

Family

ID=16875719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62228390A Expired - Lifetime JPH0620208B2 (en) 1987-09-14 1987-09-14 Communication terminal adapter device

Country Status (1)

Country Link
JP (1) JPH0620208B2 (en)

Also Published As

Publication number Publication date
JPH0620208B2 (en) 1994-03-16

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