JPS647357U - - Google Patents
Info
- Publication number
- JPS647357U JPS647357U JP9943887U JP9943887U JPS647357U JP S647357 U JPS647357 U JP S647357U JP 9943887 U JP9943887 U JP 9943887U JP 9943887 U JP9943887 U JP 9943887U JP S647357 U JPS647357 U JP S647357U
- Authority
- JP
- Japan
- Prior art keywords
- data
- constant
- conversion
- selection
- mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Calculators And Similar Devices (AREA)
Description
第１図は本考案の一実施例の構成を示すブロツ
ク回路図、第２図は第１図におけるＲＡＭの一部
構成図、第３図は上記実施例の外観を示す図、第
４図は第３図における液晶表示パネルの表示体配
列を示す図、第５図は本実施例の動作の概要を示
すジエネラルフローチヤート、第６図は該ジエネ
ラルフローチヤート中のキー処理を詳細に示すフ
ローチヤート、第７図は第６図のフローチヤート
中の換算処理を詳細に示すフローチヤート、第８
図は上記ジエネラルフローチヤート中の表示処理
を詳細に示すフローチヤート、第９図は上記実施
例のモード切換に伴なう液晶表示パネルの表示変
遷図である。
１……ＣＰＵ、２……クロツク信号発生部、２
ａ……発振回路、２ｂ……分周回路、３……ＲＡ
Ｍ、４……表示部、５……パルスモータ、６……
キー入力部、１０……時計ケース、１１……時針
、１２……分針、１４……文字盤、１５……液晶
表示パネル、１６……キーボード、２０……換算
モード表示体、２１……除算表示体、２２……乗
算表示体、２３……減算表示体、２４……加算表
示体、２５……７セグメント表示体、２６……午
後表示体、ＳＡ……モードスイツチ、Ｄ……日付
レジスタ、Ｍ……モードカウンタ、Ｔ……時刻レ
ジスタ。
FIG. 1 is a block circuit diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a partial configuration diagram of the RAM in FIG. 1, FIG. 3 is a diagram showing the external appearance of the above embodiment, and FIG. FIG. 3 is a diagram showing the display arrangement of the liquid crystal display panel, FIG. 5 is a general flowchart showing an overview of the operation of this embodiment, and FIG. 6 is a detailed view of key processing in the general flowchart. Flowchart, Figure 7 is a flowchart, Figure 8, showing in detail the conversion process in the flowchart of Figure 6.
The figure is a flowchart showing in detail the display processing in the general flowchart, and FIG. 9 is a diagram showing the display changes of the liquid crystal display panel accompanying mode switching in the above embodiment. 1...CPU, 2...Clock signal generator, 2
a ...Oscillation circuit, 2 b ...Divide circuit, 3...RA
M, 4...Display section, 5...Pulse motor, 6...
Key input section, 10... Watch case, 11... Hour hand, 12... Minute hand, 14... Dial, 15... Liquid crystal display panel, 16... Keyboard, 20... Conversion mode display, 21... Division Display, 22...Multiplication display, 23...Subtraction display, 24...Addition display, 25...7 segment display, 26...PM display, SA...Mode switch, D...Date register , M...Mode counter, T...Time register.
Claims (1)
する選択指定手段と、 この選択指定手段により定数記憶モードが選択
指定されている際に、テンキーにより定数データ
が記憶されると共に所定のキーでクリアされる定
数記憶部と、 前記選択指定手段により換算モードが選択指定
されている際に、乗算あるいは除算キーにより選
択された乗算あるいは除算の演算指定コードを記
憶する記憶手段と、 前記選択指定手段により換算モードが選択指定
されている際に、前記テンキーから換算データが
入力された場合に前記記憶手段に乗算指定コード
が記憶されているときは換算データと定数データ
とを乗算し、除算コードが記憶されているときは
換算データを定数データで除算する演算手段と、 この演算手段で求められたデータを表示する表
示手段とを備えることを特徴とする単位換算機能
付小型電子式計算機。[Scope of Claim for Utility Model Registration] Selection and specification means for selectively specifying a conversion mode and a constant storage mode; and when the constant storage mode is selected and specified by the selection and specification means, constant data is stored using a numeric keypad. a constant storage unit that is cleared by a predetermined key; and a storage unit that stores an operation designation code for multiplication or division selected by the multiplication or division key when the conversion mode is selected and designated by the selection designation device. and, when the conversion mode is selected and specified by the selection specification means, when conversion data is input from the numeric keypad and a multiplication specification code is stored in the storage means, the conversion data and constant data are input. A compact device with a unit conversion function, characterized by comprising arithmetic means for multiplying and dividing the converted data by constant data when a division code is stored, and a display means for displaying the data obtained by the arithmetic means. Electronic calculator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9943887U JPS647357U (en) | 1987-06-30 | 1987-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9943887U JPS647357U (en) | 1987-06-30 | 1987-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS647357U true JPS647357U (en) | 1989-01-17 |
Family
ID=31326597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9943887U Pending JPS647357U (en) | 1987-06-30 | 1987-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS647357U (en) |
-
1987
- 1987-06-30 JP JP9943887U patent/JPS647357U/ja active Pending
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