JPS647440B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a memory circuit device using superconducting material elements.

A Josephson device is used as a superconducting material element, and various types of memory circuits using this Josephson device have been proposed.

Figure 1 shows a conventional quantum interference type memory circuit. This circuit consists of two Josephson devices 1 and 2 connected via inductances 3 and 4, and controls the gate current Ig and the magnetic field. A circuit that flows a control current IC (in this case, a data current Id, a bias current IB, and an x-address current Iχ) for the purpose of By changing the gate current and the gate current, the magnetic flux quantum number of the Josephson element is set to a state of 1 or 2, so that a binary storage state ("1" or "0") can be stored and read.

Next, a binary signal “1” is sent to this conventional memory circuit.
The second principle is to store information corresponding to
This will be explained using the threshold characteristic diagram of the Josephson memory device shown in the figure.

In FIG. 2, the horizontal axis plots the control current IC (=Iχ+Ib+Id) flowing through the control line that creates the magnetic field of the memory element, and the vertical axis plots the gate current Ig of the element. Area 11 surrounded by curve Q0
The magnetic flux quantum number is 0, and the region 12 surrounded by the curve Q1
respectively indicate superconducting regions where the magnetic flux quantum number is 1. still,
In this case, for example, states in which the magnetic flux quantum numbers are 0 and 1 are made to correspond to binary signals "1" and "0", respectively. In addition, a bias current IB is applied to the control line of the element in advance, and the element is connected to the common area of both areas 11 and 12 in FIG.
Bias is applied to the state of the point shown by .

To write a “1” signal from this state,
A negative current Id is passed through the control line to move the operating point to a point 14 in a region 11 where the magnetic flux quantum number of the element becomes 0. When the write signal of "1" disappears, the operating point returns to point 13, but the magnetic flux quantum number remains 0.

On the other hand, in order to write a "0" signal, a positive current Id is passed through the control line to move the operating point to point 15 in the region where the magnetic flux quantum number is 1. When this "0" write signal disappears, the operating point returns to point 13, but the magnetic flux quantum number remains at 1.

Next, in order to read the "1" signal while it is stored, first, a gate current Ig is applied, and in addition to this, an address current Iχ for address selection and a data current as a read signal are applied to the control line. The operating point is moved from point 13 to point 17 via point 16 by flowing Id. At this time, the magnetic flux quantum number of the element transitions from 0 to 1, so a voltage is generated between the terminals of the element, and this voltage is taken out by an external circuit to read a signal of "1". On the other hand, in a state where a "0" signal is stored, the magnetic flux quantum number does not transfer and remains 1, so no voltage is generated between the terminals of the element, so a "0" signal is read. In this manner, the operation of the Josephson device memory circuit is achieved.

In the conventional memory circuit described above, when a signal "1" is read, the magnetic flux quantum number of the element remains changed from 0 to 1 and does not return to the original 0 state.
This is a destructive read memory circuit. For this reason, a memory circuit of this type equipped with a reset circuit for rewriting has been proposed, but it has the disadvantage that not only its structure but also its operation is complicated and its operation speed is slow.

Furthermore, this conventional memory circuit requires separate bias current IB to operate, so address current Iχ and data current Id
This method requires a separate control line for bias current in addition to the control line for bias current, which has the disadvantage that the structure of the memory circuit becomes complicated and large, and the manufacturing process becomes complicated.

An object of the present invention is to provide a memory circuit device for storing and reading out information respectively assigned to each possible state of the magnetic flux quantum number of a superconducting material element, in which at least one pair of Josephson elements are connected in series with the Josephson element. A closed circuit is formed by a pair of inductance elements connected to the inductance element and an inductance element connected to the Josephson element, and an input terminal connected to the gate signal conductor Y and the other output terminal are connected at the midpoint of the closed circuit. an x-address signal control line X for storing and reading out the information, which has a pair of inductance elements each electromagnetically coupled to an inductance element of the Josefson element, an information signal control line D, a resistor, and a pair of inductance elements. A rewriting control line RW having a rewriting element is provided, and a pair of inductance elements of the rewriting control line have an inductance between both terminals of the element due to a change in the magnetic flux quantum number of the element when the information is read. are connected to each pair of inductance elements of the gate signal control line Y and the information signal control line D, respectively, to create a magnetic field to return the magnetic flux quantum number to its original state before change using the voltage generated in the gate signal control line Y and information signal control line D. A memory circuit device using a superconducting material element is characterized in that a rewriting return path is configured to automatically return the quantum number of the Josephson element to its original state through electromagnetic coupling.

Still another object of the present invention is to form a closed circuit by connecting in series at least one pair of Josephson elements and at least one pair of inductance elements connected thereto, and to form a closed circuit between each inductance element. an input terminal connected to the conductor Y for
an x-address signal control line X and an information signal control line D each having an inductance element electromagnetically coupled to the inductance element of the Josephson element;
A rewriting control line RW having at least one pair of inductance elements and a resistor magnetically coupled to the inductance element of the Josephson element is connected between the input terminal and the output terminal of the closed circuit to form a return path. When storing information in a memory circuit device in the state of magnetic flux quantum number of the superconducting material element corresponding to the information by changing the magnetic field and gate current created by the control line, first, the control line for the x address signal is Depending on the selection of the x address, a bias current is supplied or not supplied, and the operating point of the element is moved to a bias point located in the middle within a common region where any magnetic flux quantum number can be taken, or it remains as it is. Then, corresponding to the information to be stored, a data signal is supplied to the information signal control line to set the operating point to a common region close to the region of the state of the magnetic flux quantum number corresponding to the information. and then supplying a write gate current to a gate signal conductor to move the operating point to a state region of the magnetic flux quantum number corresponding to the information. The present invention relates to a memory driving method for a memory circuit.

Embodiments of the present invention will be described below with reference to FIGS. 3 and 4.

FIG. 3 is a circuit diagram showing one embodiment of the memory circuit of the present invention, in which reference numerals 18 and 19 are Josephson elements, one end of which is connected via inductance elements 20 and 21, respectively (input terminal 30
) and the other ends are directly connected to each other (output terminal 31), so-called single
It forms a quantum flux memory loop circuit. A gate current conducting wire Y for a y-address signal current Iy to be passed as a gate current Ig to the input terminal 30 and a conducting wire R for a read signal current IR to be caused to flow as required are separately connected. In the figure, X is a control line for the x address signal current Iχ, D is a control line for the data signal current Id, and these control signals Iχ and Id
flows through the respective control lines X and D to the respective inductance elements 23, 24 and 25, 26.
and inductance elements 20 and 21 of the loop circuit.
It is inductively coupled to elements 18 and 19 via. In the present invention, for example, a rewriting control line is provided between the input terminal 30 and the output terminal 31 of this loop circuit.
Equipped with RW. This rewriting control line RW detects the voltage generated due to the state change of the magnetic flux quantum number of the Josephson element that occurs when the memory circuit is read, and using this voltage, current is applied to this rewriting control line RW. The magnetic flux quantum number of the Josephson element is returned to its original state before reading by generating a magnetic field.
A resistor provided in the rewriting control line RW is indicated by 27, and inductance elements included in the rewriting control line RW are indicated by 28 and 29. Note that the control line conductor means a so-called conductor through which current can flow.

Next, the operation of the embodiment of the present invention shown in FIG. 3 will be explained with reference to FIGS. 4a to 4c. Figure 4 a~
c is the threshold characteristic diagram of each element, in which the horizontal axis plots the control current IC flowing through the control line D that creates the magnetic field of the element, and the vertical axis plots the gate current Ig of the Josephson element. show. Also, the area surrounded by the curve Q ₀ is the area where the magnetic flux quantum number is 0 (for example, the area shown by 32 and 40), and the area surrounded by the curve Q ₁ is the area where the magnetic flux quantum number is 1. Area (for example, areas indicated by 33 and 41)
It is.

FIG. 4a is a diagram for explaining the operation of writing a signal "1". In this embodiment, the states in which the magnetic flux quantum numbers of the memory element are 0 and 1 correspond to the binary signals "0" and "1". Now, when writing a signal "1" from the operating point (origin) 0 in the figure, first, the x address signal current Iχ is used to change the operating point of the element to the bias point 34, which is located approximately midway in the common area of 32 and 33. Then, the operating point is moved to point 35 by the data signal current Id corresponding to the "1" signal to be written, and the Josephson element is moved to the point 35 with the y address signal current Iy. The transition is made to point 36, thus making the magnetic flux quantum number of the Josephson element 1. Thereafter, even if each signal current disappears, the operating point returns to point 0, but the magnetic flux quantum number remains at 1, and a signal of "1" is stored.

Next, FIG. 4b shows an operation diagram for writing a "0" signal. In the figure, points 37 and 38 are regions where the magnetic flux quantum numbers are 0 and 1, and the operating point of the memory whose x address is not selected is located at bias point 37 by a bias current, but when the x address is selected, The operating point of the memory remains at point 0, and the operating point is further moved to 38 by the data signal current Id corresponding to the "0" signal, and the operating point is further shifted to the magnetic flux quantum by the y address signal current Iy. Transition is made to point 39 where the number is 0. Therefore, even after each signal current disappears, the magnetic flux quantum number is maintained at 0, and a signal of "0" is stored.

Next, for the operation of reading the “1” signal, the fourth
This will be explained with reference to Figure c. In this case, the operating point of the memory whose x address is not selected is located at point 42 due to the bias current. Also, the operating point of the selected memory of the x address signal current Iχ remains at point 0, and is determined only by the y address signal current Iy, or if necessary, this y address signal current Iy and the read gate current. The operating point is moved from point 0 to point 44 via point 43 by both IR and IR (both referred to as read gate current). The region 40 where this point 44 exists is a region with a magnetic flux quantum number of 0, and since the Josephson element was initially maintained in a state with a magnetic flux quantum number of 1, this change in quantum number causes the terminals of the Josephson element to between the input terminal 30 and the output terminal 3 of the loop circuit.
A voltage is generated between 1 and 1. This voltage is applied to the control line RW in FIG. 3, and based on this, a current, that is, a rewrite current flows, which causes Josephson to pass through the inductive coupling between the inductance elements 28 and 29 and the inductance elements 20 and 21 of the loop circuit. The magnetic flux quantum numbers of elements 18 and 19 are returned from the 0 state (length 44) to the 1 state (point 45).

As described above, according to the memory circuit using the superconducting material element (Josephson element) of the present invention, since the rewriting control line is provided, when the magnetic flux quantum number of the element changes during reading, this transition The magnetic flux quantum number of the Josephson element can be automatically transitioned back to the original state by using the voltage generated due to the above, and thus the memory circuit of the present invention functions as a non-destructive readout memory circuit. Therefore, the memory circuit of the present invention not only improves the calculation speed compared to conventional memory circuits, but also eliminates the need for various circuits such as a reset circuit for rewriting and a circuit for timing adjustment. It also has the advantage that the operation is significantly simplified, and the stability and reliability of the operation are greatly improved.

Further, according to the memory circuit of the present invention, there is no special control line for the bias current, and the presence or absence of supply of the current corresponding to the bias corresponds to the selection of the x address. When a memory circuit is configured as a device, its structure is simpler and smaller than that of the conventional device, and the number of manufacturing steps is also reduced, so it has the advantage of being easy and inexpensive to manufacture.

As described above, a Josephson memory system capable of automatic rewriting is achieved with a simple structure with few control lines, low power consumption, and ultra-high speed operation.

It is clear that the invention is not limited only to the embodiments described above, but can be subjected to many variations and modifications. For example, it is clear that the memory circuit device of the present invention can be applied not only to a case where the number of Josephson devices is one, but also to a case where there are three or more devices. Furthermore, it is clear that the present invention can be applied to memory circuits other than the quantum interference type memory circuit described above.

Furthermore, in the above example, the quantum number state is two states of 0 and 1, but the present invention utilizes a plurality of states of 3 or more to store and read a binary signal or a multi-value signal of 3 or more values. It is clear that it can also be applied to circuits.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional memory circuit, Figure 2 is a circuit diagram showing a conventional memory circuit.
The figures are diagrams for explaining the operating principle of the memory circuit shown in Fig. 1, Fig. 3 is a circuit diagram showing one embodiment of a memory circuit device using the superconducting material element of the present invention, and Figs. c is a diagram for explaining the operating principle of the memory circuit device of FIG. 3; 1, 2...Josephson element, 3-10...Inductance element, Ic...Control current, Iχ...x address current, Ib...Bias current, Id...Data current, X...x address control line, B ...Bias current control line, D...Data current line, G...Gate current line, Ig...Gate current, 11...Region of magnetic flux quantum number 0, 12...Region of magnetic flux quantum number 1, 13,
14, 15, 16, 17...Each operating point, 18, 1
9...Superconducting material element (or Josephson element),
20, 21, 23-26... Inductance element, 22, 27... Resistor, 30... Input terminal, 3
1...Output terminal, X...x address signal current control line, Y...y address signal current (or gate current) conducting wire, D...data signal current control line, R
...Writing conductor, RW...Rewriting control wire.

Claims (1)

[Scope of Claims] 1. A memory circuit device for storing and reading information respectively assigned to each possible state of a magnetic flux quantum number of a superconducting material element, comprising at least one pair of Josephson elements connected in series with the Josephson element. A closed circuit is formed by the pair of inductance elements connected to the Josephson element, and an input terminal connected to the gate signal conductor Y and the other output terminal are provided at the intermediate point thereof, An x-address signal control line X for storing and reading the information, which has a pair of inductance elements each electromagnetically coupled with the inductance element of the Josephson element, an information signal control line D, a resistor, and a pair of inductance elements. A rewriting control line RW is provided, and a pair of inductance elements of the rewriting control line generates a magnetic flux between both terminals of the element due to a change in the magnetic flux quantum number of the element when the information is read. The gate signal control line Y and the information signal control line D are electromagnetically coupled to each pair of inductance elements to create a magnetic field for returning the magnetic flux quantum number to its original state before the change using the applied voltage. A memory circuit device using a superconducting material element, characterized in that a rewriting return path is configured to automatically return the quantum number of the Josephson element to its original state. 2. A closed circuit is formed by at least one pair of Josephson elements, a pair of inductance elements each connected in series with the Josephson element, and an inductance element connected to the Josephson element, and a gate signal conducting wire Y is connected to the intermediate point thereof. and an x-address signal control line X for storing and reading the information, the control line having a pair of inductance elements that are electromagnetically coupled to the inductance elements of the Josephson element. , an information signal control line D and a rewriting control line RW having a resistor and a pair of inductance elements are provided, and the pair of inductance elements of the rewriting control line control the magnetic flux of the element when the information is read. A gate signal control line Y and information are connected to each other to create a magnetic field to return the magnetic flux quantum number to its original state before the change by using the voltage generated between both terminals of the element due to a change in the quantum number. In a rewriting return path that is electromagnetically coupled with each pair of inductance elements of the signal control line D to automatically return the quantum number of the Josephson element to its original state, the magnetic field created by the control line and When storing information in the memory circuit device in the state of the magnetic flux quantum number of the superconducting material element corresponding to the information by changing the gate current, first, the bias current is changed to the control line for the x address signal depending on whether or not the x address is selected. The operating point of the element is shifted to a bias point located in the middle of a common region capable of taking any magnetic flux quantum number by supplying or not supplying the magnetic flux quantum number, or leaving it as it is; corresponding to the information to be determined, supplying a data signal to the information signal control line to move the operating point to a point in a common region close to the region of states of the magnetic flux quantum number corresponding to the information; and then 1. A storage driving method for a memory circuit, characterized in that a write gate current is supplied to a gate signal conducting wire to shift the operating point to a region of the state of the magnetic flux quantum number corresponding to the information.