JPS64761A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS64761A
JPS64761A JP15569387A JP15569387A JPS64761A JP S64761 A JPS64761 A JP S64761A JP 15569387 A JP15569387 A JP 15569387A JP 15569387 A JP15569387 A JP 15569387A JP S64761 A JPS64761 A JP S64761A
Authority
JP
Japan
Prior art keywords
side wall
gate electrode
metal
source
metal silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15569387A
Other languages
Japanese (ja)
Other versions
JPH01761A (en
Inventor
Makio Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP15569387A priority Critical patent/JPS64761A/en
Publication of JPH01761A publication Critical patent/JPH01761A/en
Publication of JPS64761A publication Critical patent/JPS64761A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To prevent reaction between a side wall and metal and to prevent short circuits between source/drain regions and a gate electrodes, in a semiconductor device having a self-aligned silicide structure, in which the insulating film side wall is provided on the gate electrode, by a constitution, wherein Si is not included in the insulating film side wall.
CONSTITUTION: On a P-type semiconductor substrate 201, an element isolating oxide film 202, a gate oxide film 203, a gate electrode 204 and a low- concentration N-type impurity diffused layer 205 are formed. An Al2O3 film 209 is formed by a chemical vapor growth method. Then the entire surface is etched with reactive ions, and a side wall 206 of Al2O3 is formed. Metal silicide 208 is formed only on the gate electrode 204 and source/drain diffused layers 207. Since Si is not included in the side wall as described above, Si and the metal are not reacted when the metal silicide is formed, and the metal silicide is not formed on the side wall. A semiconductor layer having an excellent self-aligned silicide structure, wherein the gate electrode and the source/ drain diffused layers are sufficiently isolated, is obtained.
COPYRIGHT: (C)1989,JPO&Japio
JP15569387A 1987-06-23 1987-06-23 Semiconductor device Pending JPS64761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15569387A JPS64761A (en) 1987-06-23 1987-06-23 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15569387A JPS64761A (en) 1987-06-23 1987-06-23 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH01761A JPH01761A (en) 1989-01-05
JPS64761A true JPS64761A (en) 1989-01-05

Family

ID=15611476

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15569387A Pending JPS64761A (en) 1987-06-23 1987-06-23 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS64761A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5521411A (en) * 1991-12-31 1996-05-28 Sgs-Thomson Microelectronics, Inc. Transistor spacer etch pinpoint structure
US5698883A (en) * 1989-10-09 1997-12-16 Kabushiki Kaisha Toshiba MOS field effect transistor and method for manufacturing the same
US6724051B1 (en) * 2000-10-05 2004-04-20 Advanced Micro Devices, Inc. Nickel silicide process using non-reactive spacer
US7428811B2 (en) 2003-11-26 2008-09-30 Isuzu Motors Limited Torque converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5698883A (en) * 1989-10-09 1997-12-16 Kabushiki Kaisha Toshiba MOS field effect transistor and method for manufacturing the same
US5521411A (en) * 1991-12-31 1996-05-28 Sgs-Thomson Microelectronics, Inc. Transistor spacer etch pinpoint structure
US6724051B1 (en) * 2000-10-05 2004-04-20 Advanced Micro Devices, Inc. Nickel silicide process using non-reactive spacer
US7428811B2 (en) 2003-11-26 2008-09-30 Isuzu Motors Limited Torque converter

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