JPS647634A - Large-scale integrated circuit - Google Patents

Large-scale integrated circuit

Info

Publication number
JPS647634A
JPS647634A JP62163130A JP16313087A JPS647634A JP S647634 A JPS647634 A JP S647634A JP 62163130 A JP62163130 A JP 62163130A JP 16313087 A JP16313087 A JP 16313087A JP S647634 A JPS647634 A JP S647634A
Authority
JP
Japan
Prior art keywords
signal
input
circuit
test
outputting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62163130A
Other languages
Japanese (ja)
Inventor
Makoto Ozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62163130A priority Critical patent/JPS647634A/en
Publication of JPS647634A publication Critical patent/JPS647634A/en
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a system LSI capable of reducing test sequence and capable of simply executing a test and debugging by installing an arithmetic circuit outputting a specified pattern signal when a test signal is input and a changeover circuit outputting an output signal from the arithmetic circuit to the outside when the test signal is input. CONSTITUTION:A glue circuit 3 connected to an external bus 9, an internal bus 7 connected to the glue circuit 3, a plurality of micro-cells 5 connected to the internal bus 7, an arithmetic circuit 11 being connected to the internal bus 7 and outputting a specified pattern signal when a predetermined test signal is input from the external bus 9, and a changeover circuit 13 outputting an output signal from the arithmetic circuit 11 to the outside when said test signal is input are formed onto the same substrate 1. When a test permission signal S7 is turned ON and the predetermined test signal is input to the external bus 9, the signal is input to the decoder 11 through the external bus 9, the glue circuit 3 and the internal bus 7. The decoder 11 outputs a corresponding decoding output to the test signal, and the decoding output is output to the outside through a selector 13.
JP62163130A 1987-06-30 1987-06-30 Large-scale integrated circuit Pending JPS647634A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62163130A JPS647634A (en) 1987-06-30 1987-06-30 Large-scale integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62163130A JPS647634A (en) 1987-06-30 1987-06-30 Large-scale integrated circuit

Publications (1)

Publication Number Publication Date
JPS647634A true JPS647634A (en) 1989-01-11

Family

ID=15767764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62163130A Pending JPS647634A (en) 1987-06-30 1987-06-30 Large-scale integrated circuit

Country Status (1)

Country Link
JP (1) JPS647634A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112014000682B4 (en) 2013-02-05 2021-11-11 Denso Corporation DEVICE FOR DETECTING A DESTINATION IN THE ENVIRONMENT OF A VEHICLE

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112014000682B4 (en) 2013-02-05 2021-11-11 Denso Corporation DEVICE FOR DETECTING A DESTINATION IN THE ENVIRONMENT OF A VEHICLE

Similar Documents

Publication Publication Date Title
AU580362B2 (en) Improvements in or relating to integrated circuits
HK66884A (en) Instruction set modifier register
WO1996009583A3 (en) Data processing circuits and interfaces
JPS5735417A (en) D/a converter
JPS641050A (en) Computer system provided with byte order conversion mechanism
JPS562047A (en) Debugging unit
JPS5741741A (en) Central arithmetic processor
JPS5455141A (en) Diagnosing shift circuit
JPS57121741A (en) Integrated circuit system
JPS54152939A (en) Microprogram interruption control system
JPS6467642A (en) Microprogram controller
JPS5685127A (en) Digital signal processor
JPS57164338A (en) Selection circuit for priority
JPS54149438A (en) Sequence control circuit
JPS5455337A (en) Logical operation processing circuit
JPS57201936A (en) Integrated logical circuit
JPS5687129A (en) Execution order controlling system of microprogram for data processor
JPS57196559A (en) Semiconductor integrated circuit
JPS6453651A (en) By-pass device
JPS54107234A (en) Information processing unit
JPS5523582A (en) Request selection system
FR2416509A1 (en) Digital data transfer device - has control unit comprising clock coupled to random access instruction store and register
JPS5693434A (en) Counter
JPS5532180A (en) Sequence controller capable of connecting plurality of external equipments
JPS52143724A (en) Integration circuit logic system