JPS6477152A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS6477152A JPS6477152A JP62234188A JP23418887A JPS6477152A JP S6477152 A JPS6477152 A JP S6477152A JP 62234188 A JP62234188 A JP 62234188A JP 23418887 A JP23418887 A JP 23418887A JP S6477152 A JPS6477152 A JP S6477152A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- resin
- chip mounting
- mounting section
- inner leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/0711—Apparatus therefor
- H10W72/07141—Means for applying energy, e.g. ovens or lasers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07521—Aligning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
- H10W72/865—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent a leakage current from flowing between inner leads by a method wherein an insulation treatment is performed onto a semiconductor chip mounting section of inner leads. CONSTITUTION:A semiconductor chip 2 is mounted on a semiconductor chip mounting section 1A0 of an inner lead 1A of a lead frame 1 with no tab through the intermediary of a bonding agent 5, and the inner lead 1A is electrically connected with the semiconductor chip 2 through a bonding wire 3, which are sealed with a resin sealing material 4 such as resin or the like. And, the semiconductor chip mounting section 1A0 of the inner lead 1A is subjected to an insulation treatment by using an insulating substance such as a thermosetting polyimide series resin or the like. Therefore, a leakage current is prevented from flowing between the inner leads 1A through the interface between a semiconductor chip mounting insulating film and the resin sealing material 4 of resin or the like.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62234188A JPS6477152A (en) | 1987-09-18 | 1987-09-18 | Lead frame |
| KR1019880006089A KR880014671A (en) | 1987-05-27 | 1988-05-24 | Resin Filled Semiconductor Device |
| US07/199,538 US4951122A (en) | 1987-05-27 | 1988-05-27 | Resin-encapsulated semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62234188A JPS6477152A (en) | 1987-09-18 | 1987-09-18 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6477152A true JPS6477152A (en) | 1989-03-23 |
Family
ID=16967057
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62234188A Pending JPS6477152A (en) | 1987-05-27 | 1987-09-18 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6477152A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106848055A (en) * | 2012-12-14 | 2017-06-13 | 旭化成微电子株式会社 | The manufacture method of Magnetic Sensor and magnet sensor arrangement and Magnetic Sensor |
-
1987
- 1987-09-18 JP JP62234188A patent/JPS6477152A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106848055A (en) * | 2012-12-14 | 2017-06-13 | 旭化成微电子株式会社 | The manufacture method of Magnetic Sensor and magnet sensor arrangement and Magnetic Sensor |
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