JPS6480057A - Manufacture of circuit module - Google Patents

Manufacture of circuit module

Info

Publication number
JPS6480057A
JPS6480057A JP23477187A JP23477187A JPS6480057A JP S6480057 A JPS6480057 A JP S6480057A JP 23477187 A JP23477187 A JP 23477187A JP 23477187 A JP23477187 A JP 23477187A JP S6480057 A JPS6480057 A JP S6480057A
Authority
JP
Japan
Prior art keywords
circuit module
insulating layer
supporting plate
resin
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23477187A
Other languages
Japanese (ja)
Inventor
Akinori Motomiya
Masayuki Ouchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23477187A priority Critical patent/JPS6480057A/en
Publication of JPS6480057A publication Critical patent/JPS6480057A/en
Pending legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

PURPOSE:To supply a thin type circuit module at a low price by a method wherein a process, in which an insulating layer will be formed on the wiring surface of a semiconductor element in advance using photosensitive resin, is provided. CONSTITUTION:An insulating layer 3, covering the part excluding an electrode pad 11, is formed by adhering a photosensitive dry film resist 31 to a wafer and by conducting exposing and developing operations thereon. An IC 1 chip having the insulating layer 3 is obtained by dicing the wafer. The IC 1 and a chip capacitor 2 are placed on a supporting plate 4 in such a manner that their wiring surfaces are positioned on the side of the supporting plate 4, and ultraviolet ray hardening resin 51 is poured around them. A substrate 5 is formed by hardening the resin 51 by projecting ultraviolet rays thereon, and the supporting plate 4 is peeled off. As a result, a thin type circuit module is supplied at a low price.
JP23477187A 1987-09-21 1987-09-21 Manufacture of circuit module Pending JPS6480057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23477187A JPS6480057A (en) 1987-09-21 1987-09-21 Manufacture of circuit module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23477187A JPS6480057A (en) 1987-09-21 1987-09-21 Manufacture of circuit module

Publications (1)

Publication Number Publication Date
JPS6480057A true JPS6480057A (en) 1989-03-24

Family

ID=16976107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23477187A Pending JPS6480057A (en) 1987-09-21 1987-09-21 Manufacture of circuit module

Country Status (1)

Country Link
JP (1) JPS6480057A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004021752A1 (en) * 2002-08-27 2004-03-11 Fujitsu Limited Method for producing circuit board and circuit board
US8833612B2 (en) 2009-11-19 2014-09-16 Kao Corporation Fixed quantity discharge squeeze container

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004021752A1 (en) * 2002-08-27 2004-03-11 Fujitsu Limited Method for producing circuit board and circuit board
US8833612B2 (en) 2009-11-19 2014-09-16 Kao Corporation Fixed quantity discharge squeeze container

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