JPS64843B2 - - Google Patents
Info
- Publication number
- JPS64843B2 JPS64843B2 JP3786486A JP3786486A JPS64843B2 JP S64843 B2 JPS64843 B2 JP S64843B2 JP 3786486 A JP3786486 A JP 3786486A JP 3786486 A JP3786486 A JP 3786486A JP S64843 B2 JPS64843 B2 JP S64843B2
- Authority
- JP
- Japan
- Prior art keywords
- dielectric
- ground conductor
- substrate
- microwave integrated
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 12
- 239000003989 dielectric material Substances 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 238000005476 soldering Methods 0.000 claims 1
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000003321 amplification Effects 0.000 description 3
- 239000006071 cream Substances 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
- H01P3/08—Microstrips; Strip lines
- H01P3/085—Triplate lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Waveguides (AREA)
Description
【発明の詳細な説明】
本発明はマイクロ波ストリツプラインを有する
マイクロ波集積回路の製造方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a microwave integrated circuit having microwave striplines.
第1図は増幅トランジスタTR、ストリツプラ
インL1,L2、抵抗R1,R2,R3、容量C1,C2,
C3,C4,C5からなるマイクロ波増幅回路を示し
ているが、この増幅回路を厚膜技術によりマイク
ロ波集積回路で形成した場合の構造の一部を第2
図に示す。 Figure 1 shows the amplification transistor TR, strip lines L 1 , L 2 , resistors R 1 , R 2 , R 3 , capacitances C 1 , C 2 ,
A microwave amplification circuit consisting of C 3 , C 4 , and C 5 is shown, but a part of the structure when this amplification circuit is formed using a microwave integrated circuit using thick film technology is shown in the second diagram.
As shown in the figure.
第2図において、誘電体Dの一方の面に接地導
体a1が設けられ、地面に導体や部品が設けられて
いる。第2図においては第1図と同一の記号を付
して示しているが、抵抗やコンデンサとしてはチ
ツプ部品を用いている。尚、a2,a3,a4部品は部
品取り付け用の電極である。ストリツプライン
L1の寸法は良く知られているように接地導体a1と
ストリツプラインL1に挾まれた誘電体Dの誘電
率の平方根に逆比例する関係で決められる。 In FIG. 2, a ground conductor a1 is provided on one surface of the dielectric D, and conductors and components are provided on the ground. Although the same symbols as in FIG. 1 are used in FIG. 2, chip parts are used as the resistors and capacitors. Note that parts a 2 , a 3 , and a 4 are electrodes for mounting parts. strip line
As is well known, the dimension of L 1 is determined inversely proportional to the square root of the dielectric constant of the dielectric D sandwiched between the ground conductor a 1 and the stripline L 1 .
このような集積回路のマイクロ波ストリツプラ
インは誘電体基板の両面に導体を印刷又は蒸着し
て形成するか、両面銅張積層板を印刷やエツチン
グして形成するかしているが、斯る従来例は、い
ずれも誘電体Dが基板となつていて回路を機械的
にも保持する。従つて誘電体として機械的に脆い
材料が使用できず、その面からの制約を受ける。
そのため、誘電率の大きな材料を使用できないこ
とが多く、ストリツプライン(従つてマイクロ波
集積回路)の小型化ができないという欠点を有す
る。また、誘電体による基板は極端に大きく形成
できないから製造工程においてエンドレスに近い
形で連続送りする(後で分割する)ことが不可能
であり、製造上の能率が悪い。 Microwave striplines for such integrated circuits are formed by printing or vapor depositing conductors on both sides of a dielectric substrate, or by printing or etching a double-sided copper-clad laminate. In all conventional examples, the dielectric D serves as a substrate and also mechanically holds the circuit. Therefore, mechanically fragile materials cannot be used as the dielectric, and there are restrictions from this point of view.
Therefore, it is often impossible to use a material with a large dielectric constant, and the stripline (and thus the microwave integrated circuit) cannot be miniaturized. Further, since a dielectric substrate cannot be made extremely large, it is impossible to continuously feed the substrate in an almost endless manner during the manufacturing process (divide it later), resulting in poor manufacturing efficiency.
本発明はこれらの欠点を払拭するように工夫し
た新規且つ有効なマイクロ波集積回路の製造方法
を提案するものである。 The present invention proposes a novel and effective method for manufacturing microwave integrated circuits devised to eliminate these drawbacks.
以下図面に示した実施例に従つて詳述する。 The embodiments will be described in detail below according to the embodiments shown in the drawings.
本発明では第3図に示すように金属板等の板状
の接地導体1を基板として、その上に誘電体2,
3を設け、更にその上に設けられた導体8,9と
でストリツプラインを形成したことを特徴として
いる。このように本発明では誘電体を基板とせず
に、接地導体を基板としていることによりストリ
ツプラインは基板の両面に形成することができ、
従つて第3図は接地導体1の両面A,Bにマイク
ロ波集積回路を形成した場合を示している。第3
図において、10,11は半田レジスト、12は
接着剤、13,14はチツプ部品、15,16は
チツプ部品の電極、17は半田、18はクリーム
半田若しくは導電性接着剤、19は両面の回路の
接地をとるための導体である。 In the present invention, as shown in FIG. 3, a plate-shaped ground conductor 1 such as a metal plate is used as a substrate, and a dielectric material 2,
3 and conductors 8 and 9 provided thereon to form a stripline. In this way, in the present invention, striplines can be formed on both sides of the substrate by using the ground conductor as the substrate instead of using the dielectric as the substrate.
Therefore, FIG. 3 shows a case where microwave integrated circuits are formed on both surfaces A and B of the ground conductor 1. Third
In the figure, 10 and 11 are solder resists, 12 is adhesive, 13 and 14 are chip parts, 15 and 16 are electrodes of chip parts, 17 is solder, 18 is cream solder or conductive adhesive, and 19 is a circuit on both sides. It is a conductor for grounding.
次に、第3図のようなマイクロ波集積回路を作
成する手順を第4図を参照して説明する。 Next, the procedure for creating a microwave integrated circuit as shown in FIG. 3 will be explained with reference to FIG. 4.
第4図の[]において、金属板よりなる接地
導体1にはH1,H2で示す孔加工が施される。孔
H1は接地導体1の上下に形成される回路を互い
に接続するために、また孔H2はそれぞれの回路
の接地をとる〔従つて接地導体1に接続する〕た
めに設けられたものである。 In [ ] of FIG. 4, holes indicated by H 1 and H 2 are formed in the ground conductor 1 made of a metal plate. hole
H1 is provided to connect the circuits formed above and below the ground conductor 1, and the hole H2 is provided to ground each circuit (therefore, connect it to the ground conductor 1). .
[]において、接地導体1にペースト状の誘
電体2を塗布又は印刷する。このとき孔H1,H2
にはペースト状誘電体2がタレ込んで2a,2b
の如くなる。 In [], a paste-like dielectric material 2 is applied or printed on the ground conductor 1. At this time, holes H 1 and H 2
Paste-like dielectric material 2 drips into the parts 2a and 2b.
It will be like this.
[]において、6の如きスキージを矢印方向
に所定の押圧力を接地導体1に加えつつ移動させ
る。 At [], a squeegee such as 6 is moved in the direction of the arrow while applying a predetermined pressing force to the ground conductor 1.
[]において、[]の結果、孔H1,H2に
は誘電体2が完全に詰つた状態になる。 In [], as a result of [], the holes H 1 and H 2 are completely filled with the dielectric 2.
[]において、前記誘電体2a,2bを指触
乾燥させた後、誘電体2を所定箇所に必要な厚み
で塗布又は印刷する。 In [], after the dielectrics 2a and 2b are dry to the touch, the dielectrics 2 are applied or printed at predetermined locations to a required thickness.
[]において、前記所定箇所に施された誘電
体2を指触乾燥した後、接地導体1のB面に誘電
体3を同様に塗布又は印刷し、指触乾燥する。 In [], after the dielectric 2 applied to the predetermined locations is dry to the touch, the dielectric 3 is similarly coated or printed on the B side of the ground conductor 1 and dried to the touch.
[]において、プレスなどの方法により孔
H1,H2部分に孔加工を施す。そのとき、孔H1の
壁面には充分誘電体が存在するように配慮する。
他方の孔H2については元の大きさになす。即ち、
H2内の誘電体を全て除去する。斯る状態で、誘
電体2,3の焼成を行なう。次いで全体を触媒液
中に浸漬し、更に無電解メツキにて薄く金属(例
えば銅)を付着せしめる。(図示せず)。 In [], holes are made by pressing or other methods.
Drill holes in H 1 and H 2 parts. At this time, care must be taken to ensure that sufficient dielectric material is present on the wall surface of the hole H1 .
The other hole H2 is made to its original size. That is,
Remove all dielectric in H2 . In this state, the dielectrics 2 and 3 are fired. Next, the whole is immersed in a catalyst solution, and a thin layer of metal (for example, copper) is applied by electroless plating. (not shown).
[]において、ストリツプライン及び接続電
極を作成する箇所及びA,B面の回路を接続する
孔H1、接地孔H2等を除く部分にメツキレジスト
4,5を印刷等により施す。 In [ ], plating resists 4 and 5 are applied by printing or the like to the parts except for the places where strip lines and connection electrodes are to be created, the holes H 1 for connecting the circuits on sides A and B, the ground holes H 2 , etc.
[]において、電解メツキを行ない所定の厚
さの金属(例えば銅)8,9を設ける。このと
き、接地導体1が露出しているところには更に接
地用金属19が付くことになる。次いでメツキレ
ジスト4,5を剥離し、その後、軽くエツチング
して不要な無電解メツキ部分を除去する。 At [ ], electrolytic plating is performed to provide metal (for example, copper) 8 and 9 of a predetermined thickness. At this time, a grounding metal 19 is further attached to the exposed part of the grounding conductor 1. Next, the plating resists 4 and 5 are peeled off, and then, unnecessary electroless plating portions are removed by light etching.
[]において、半田レジスト10,11を
A,B両面に図示の如く設ける。 In [ ], solder resists 10 and 11 are provided on both sides A and B as shown.
[XI]において、電極間に接着剤12を印刷若
しくはデイスペンサで塗布する。この接着剤は熱
硬化性のものを用いるものとする。 In [XI], adhesive 12 is applied between the electrodes by printing or using a dispenser. This adhesive is thermosetting.
[XII]において、チツプ抵抗、チツプコンデン
サ、マイクロトランジスタ、ミニモールド半導体
等のチツプ部品13を接着剤12上に装着し、加
熱して該接着剤12を硬化させ、上記チツプ部品
13を仮止めする。 In [XII], chip parts 13 such as chip resistors, chip capacitors, microtransistors, mini-mold semiconductors, etc. are mounted on the adhesive 12, the adhesive 12 is cured by heating, and the chip parts 13 are temporarily fixed. .
[]において、接地導体1を反転させ電極
にクリーム半田若しくは導電性接着剤18を印刷
或はデイスペンサにて塗布する。 At [ ], the ground conductor 1 is reversed and cream solder or conductive adhesive 18 is applied to the electrode by printing or using a dispenser.
[]において、チツプ部品14を装着し、
その電極16とクリーム半田若しくは導電性接着
剤18とが重なるようにして加熱溶融させ、次い
でB面を溶融半田槽に浸漬して、チツプ部品13
の電極15と接地導体1上の電極9との電気的に
充分な結合を半田17により行なう。 At [ ], the chip part 14 is installed,
The electrode 16 and the cream solder or conductive adhesive 18 are heated and melted so as to overlap, and then the B side is immersed in a molten solder bath to form the chip part 13.
A sufficient electrical connection between the electrode 15 and the electrode 9 on the ground conductor 1 is achieved by solder 17.
以上により、第3図の如きマイクロ波集積回路
を作成できる。尚、上記()()()の金属
を無電解及び電解メツキで形成する代りに蒸着等
により形成することも可能である如く、第3図の
回路作成について第4図の方法に限定されないこ
とは言うを待たない。 Through the above steps, a microwave integrated circuit as shown in FIG. 3 can be created. Note that the method for creating the circuit shown in Figure 3 is not limited to the method shown in Figure 4, as it is also possible to form the metals in (), (), and () above by vapor deposition or the like instead of by electroless or electrolytic plating. I can't wait to say it.
本発明によればマイクロ波ストリツプラインは
従来の如く誘電体を基板とせずに、接地導体を基
板としているので、機械的強度は充分にとること
ができると共に、その上に設ける誘電体として誘
電率の大きな材料を用いることができ、従つてス
トリツプ波ラインの寸法はかなり小さくすること
が可能となり、回路全体の小型化が期待できる。
しかも、接地導体の両面に回路を設けることがで
きるので、一層小型となる。また、接地導体は金
属板で実現でき、かなり長いものであつても強度
が大きいので、製造ラインにおいて、金属板を連
続して送り、最終工程で順次分割して取り出すと
いう手法を用いることができ、製造能率が飛躍的
に向上するという効果もあり、本発明は極めて有
効である。 According to the present invention, the microwave stripline does not use a dielectric as a substrate as in the past, but uses a ground conductor as a substrate, so it can have sufficient mechanical strength, and the dielectric used as a dielectric Materials with high coefficients can be used, and therefore the dimensions of the strip wave line can be made considerably smaller, and the overall size of the circuit can be reduced.
Moreover, since circuits can be provided on both sides of the ground conductor, the size can be further reduced. In addition, the grounding conductor can be realized with a metal plate, and even if it is quite long, it has great strength, so it is possible to use a method in which the metal plate is continuously fed in the production line, and then divided and taken out one after another in the final process. The present invention is extremely effective as it also has the effect of dramatically improving manufacturing efficiency.
更に、本発明は誘電体にペースト状のものを用
いるための誘電体層の厚さを自由に選択でき、例
えば、ペーストの塗布厚を接地導体の上下面で異
ならしめることにより上下面で異なる誘電率の誘
電体を形成し、同一基板内の両面に夫々、低周波
及び高周波のマイクロ波集積回路を形成すること
ができる。 Furthermore, the present invention allows the thickness of the dielectric layer to be freely selected when a paste-like dielectric is used. For example, by making the paste coating thickness different on the upper and lower surfaces of the ground conductor, different dielectric layers can be formed on the upper and lower surfaces. A low frequency and high frequency microwave integrated circuit can be formed on both sides of the same substrate, respectively.
第1図はマイクロ波増幅回路を示す図面であ
り、第2図は従来のマイクロ波集積回路の一部の
構造を示す斜視図である。第3図は本発明を実施
したマイクロ波集積回路の断面図であり、第4図
は本発明の一実施例における製造方法について説
明するための図面である。
1…接地導体、2,3…誘電体、8,9…導
体。
FIG. 1 is a drawing showing a microwave amplifier circuit, and FIG. 2 is a perspective view showing the structure of a part of a conventional microwave integrated circuit. FIG. 3 is a sectional view of a microwave integrated circuit embodying the present invention, and FIG. 4 is a drawing for explaining a manufacturing method in one embodiment of the present invention. 1... Ground conductor, 2, 3... Dielectric material, 8, 9... Conductor.
Claims (1)
程と、 前記接地導体の両面及びこの両面に連続した前
記透孔の内面にペースト状の誘電体を所定の厚さ
に形成する工程と、 前記誘電体の上面で且つ前記基板の両面及びこ
の両面に連続した前記透孔の内面に導体層を形成
する工程と、 前記導体層上に電気部品を半田付けする工程
と、 からなるマイクロ波集積回路の製造方法。[Claims] 1. A step of forming a through hole in a ground conductor made of a metal plate, and applying a paste-like dielectric material to a predetermined thickness on both surfaces of the ground conductor and on the inner surface of the through hole continuous to both surfaces. forming a conductive layer on the upper surface of the dielectric and on both surfaces of the substrate and the inner surface of the through hole continuous to both surfaces; soldering an electrical component onto the conductive layer; A method for manufacturing a microwave integrated circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3786486A JPS61228701A (en) | 1986-02-21 | 1986-02-21 | Manufacture of microwave integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3786486A JPS61228701A (en) | 1986-02-21 | 1986-02-21 | Manufacture of microwave integrated circuit |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55099144A Division JPS6014521B2 (en) | 1980-07-18 | 1980-07-18 | microwave integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61228701A JPS61228701A (en) | 1986-10-11 |
| JPS64843B2 true JPS64843B2 (en) | 1989-01-09 |
Family
ID=12509404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3786486A Granted JPS61228701A (en) | 1986-02-21 | 1986-02-21 | Manufacture of microwave integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61228701A (en) |
-
1986
- 1986-02-21 JP JP3786486A patent/JPS61228701A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61228701A (en) | 1986-10-11 |
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