JPS6485740A - Manufacture of multi-layer laminate - Google Patents

Manufacture of multi-layer laminate

Info

Publication number
JPS6485740A
JPS6485740A JP62242046A JP24204687A JPS6485740A JP S6485740 A JPS6485740 A JP S6485740A JP 62242046 A JP62242046 A JP 62242046A JP 24204687 A JP24204687 A JP 24204687A JP S6485740 A JPS6485740 A JP S6485740A
Authority
JP
Japan
Prior art keywords
wiring board
adhesive material
bonding
circuits
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62242046A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0427021B2 (2
Inventor
Takeshi Kano
Toru Higuchi
Muneisa Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP62242046A priority Critical patent/JPS6485740A/ja
Publication of JPS6485740A publication Critical patent/JPS6485740A/ja
Publication of JPH0427021B2 publication Critical patent/JPH0427021B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires

Landscapes

  • Laminated Bodies (AREA)
  • Lining Or Joining Of Plastics Or The Like (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP62242046A 1987-09-26 1987-09-26 Manufacture of multi-layer laminate Granted JPS6485740A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62242046A JPS6485740A (en) 1987-09-26 1987-09-26 Manufacture of multi-layer laminate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62242046A JPS6485740A (en) 1987-09-26 1987-09-26 Manufacture of multi-layer laminate

Publications (2)

Publication Number Publication Date
JPS6485740A true JPS6485740A (en) 1989-03-30
JPH0427021B2 JPH0427021B2 (2) 1992-05-08

Family

ID=17083463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62242046A Granted JPS6485740A (en) 1987-09-26 1987-09-26 Manufacture of multi-layer laminate

Country Status (1)

Country Link
JP (1) JPS6485740A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106714476A (zh) * 2017-02-15 2017-05-24 昆山大洋电路板有限公司 一种新型四层板盲台阶加工工艺
CN107379557A (zh) * 2016-05-03 2017-11-24 利萨·德雷克塞迈尔有限责任公司 焊接构件的方法和装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107379557A (zh) * 2016-05-03 2017-11-24 利萨·德雷克塞迈尔有限责任公司 焊接构件的方法和装置
CN107379557B (zh) * 2016-05-03 2021-02-12 利萨·德雷克塞迈尔有限责任公司 焊接构件的方法和装置
CN106714476A (zh) * 2017-02-15 2017-05-24 昆山大洋电路板有限公司 一种新型四层板盲台阶加工工艺

Also Published As

Publication number Publication date
JPH0427021B2 (2) 1992-05-08

Similar Documents

Publication Publication Date Title
US6400033B1 (en) Reinforcing solder connections of electronic devices
JPS6413735A (en) Method of mounting semiconductor device and mounted semiconductor device
MY128077A (en) Electronic circuit apparatus and method for assembling the same
EP0871219A3 (en) Metal-based semiconductor circuit substrates
ES2019743A6 (es) Una placa de conexionado impreso en capas multiples y metodos para su fabricacion y utilizacion.
JPS6485740A (en) Manufacture of multi-layer laminate
EP0310208A3 (en) Method for producing a wired circuit board
JPS6419737A (en) Multilayer interconnection tape carrier
JPS6484788A (en) Printed wiring board
SE9001766D0 (sv) Saett vid tillverkning av flerlagermoensterkort
FR2336024A2 (fr) Dispositif electronique composite et son procede de fabrication
JPS6450551A (en) Ic package structure
JPS6477136A (en) Tape carrier for semiconductor device
JPS6480524A (en) Multi-layer printed wiring board
JPS6414935A (en) Semiconductor device
JPS6442140A (en) Connection of integrated circuit
JPS62163390A (ja) プリント基板の外形加工法
JPS6448495A (en) Soldering device for flat package ic
JPS6239033A (ja) 半導体チツプキヤリアの製造方法
JPH0456187A (ja) プリント配線板の製造方法
JP2501031B2 (ja) 金属箔張り積層板
JP2782734B2 (ja) 多層プラスチックチップキャリア
JPH0428152B2 (2)
JPS6489356A (en) Hybrid integrated circuit
JPS623580B2 (2)