KR20020005592A - 배선 기판 및 그 제조 방법, 반도체 장치 및 그 제조방법, 및 전자 기기 - Google Patents
배선 기판 및 그 제조 방법, 반도체 장치 및 그 제조방법, 및 전자 기기 Download PDFInfo
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- H10W72/01221—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
- H10W72/01225—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
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Abstract
Description
Claims (15)
- 배선 기판에 있어서,상기 배선 기판 상에 형성된 절연층; 및Cu층, 및 상기 Cu층과 상기 Cu층 아래의 절연층 사이에 배치되어 상기 Cu층을 상기 절연층에 밀착하여 접속시키는 Cr 또는 Ti층으로 구성된 배선을 포함하며,상기 Cu층 상에 외부 접속용의 솔더를 제공하고, 상기 Cu층으로 확산시켜 합금을 생성하여 상기 Cr 또는 Ti층에 도달시킴으로써, 상기 솔더를 상기 Cr 또는 Ti층에 접속하는 배선 기판.
- 배선 기판에 있어서,전극을 구비하고, 상기 전극을 노출시키기 위한 홀을 갖는 절연층으로 피복된 기판;상기 전극에 접속되며 상기 절연층에 밀착하여 접속하는 Cr 또는 Ti층, 및 상기 Cr 또는 Ti층에 밀착하여 접속하는 Cu층으로 구성된 배선;상기 배선을 덮으며, 솔더링용의 다른 홀이 제공되는 보호막; 및상기 양측 홀에 탑재되고, 상기 Cu층으로 확산되어 합금을 형성하여 상기 Cr 또는 Ti층에 도달함으로써, 상기 솔더를 상기 Cr 또는 Ti층에 접속시키는 외부 접속용의 솔더를 포함하는 배선 기판.
- 제1항 또는 제2항에 있어서,상기 솔더는 Sn-함유 솔더인 배선 기판.
- 제1항 또는 제2항에 있어서,상기 Cu층은 약 0.1㎛ 내지 약 10㎛의 두께를 갖는 배선 기판.
- 제2항에 있어서,상기 Cu층과 상기 보호막 사이에 Cr층이 제공되는 배선 기판.
- 제1항 또는 제2항에 있어서,상기 절연층은 유기 수지층을 포함하는 배선 기판.
- 제1항에 있어서,상기 외부 접속용의 솔더는 상기 기판 상에 탑재된 전극에 접속된 상기 배선층에 직접적으로 접속되는 배선 기판.
- 제1항 또는 제2항에 있어서,상기 Cu층과 상기 외부 접속용의 솔더 사이에, 상기 솔더의 습윤성을 개선하기 위하여 Au 또는 Ni/Au층, 혹은 프리플럭스와 같은 부식방지층이 제공되는 배선 기판.
- 제1항 내지 제8항 중의 어느 하나에 따른 상기 기판의 외부 접속용의 솔더가 전자 부품에 접속되어 있는 전자 기기.
- 배선 기판의 제조 방법에 있어서,상기 기판 상에 절연층을 형성하는 단계;상기 단계에서 형성된 상기 절연층 상에 Cr 또는 Ti층, 및 Cu층이 적층되어 있는 배선을 형성하는 단계; 및상기 Cu층 상에 외부 접속용의 솔더를 제공하여 상기 Cu층으로 확산시켜 합금을 생성하고, 상기 Cr 또는 Ti층에 도달하게 함으로써, 상기 솔더를 상기 Cr 또는 Ti층에 접속하는 리플로우 접착 단계를 포함하는 배선 기판 제조 방법.
- 배선 기판의 제조 방법에 있어서,절연막을 형성하는 단계- 전극을 구비한 배선 기판을 상기 절연막으로 피복하고 상기 전극을 노출시키기 위하여 상기 절연막에 홀을 형성하는 단계를 포함함-;Cr 또는 Ti층을 상기 전극에 접속하여 상기 절연막과 밀착시키고, Cu층을 상기 Cr 또는 Ti층 상에 밀착하여 적층시켜 배선을 형성하는 단계;보호막을 형성하는 단계-이전 단계에서 형성된 배선을 상기 보호막으로 피복하고 솔더링용의 상기 보호막에 다른 홀을 형성하는 단계를 포함함-; 및외부 접속용의 솔더를 상기 보호막의 홀 내에 제공하고, 상기 배선의 Cu층으로 확산시켜 합금을 생성하여 상기 Cr 또는 Ti층에 도달하게 함으로써 상기 솔더를 상기 Cr 또는 Ti층에 접속하는 리플로우 접착 단계를 포함하는 배선 기판의 제조 방법.
- 반도체 장치에 있어서,전극을 구비하고, 상기 전극을 노출시키기 위한 홀이 형성된 절연층으로 피복된 반도체 기판;상기 절연층에 밀착된 Cr 또는 Ti층, 및 상기 Cr 또는 Ti층 상에 밀착하여 적층된 Cu층을 포함하는 배선;상기 배선을 덮으며 솔더링용의 홀이 형성된 보호막; 및상기 보호막의 홀 내에 제공되며 상기 배선의 상기 Cu층으로 확산되어 합금을 생성하고 Cr 또는 Ti층에 도달하게 됨으로써 상기 Cr 또는 Ti층에 접속하게되는 외부 접속용의 솔더를 포함하는 반도체 장치.
- 제12항에 있어서,상기 Cu층과 상기 보호막 사이에 Cr층이 제공되는 반도체 장치.
- 제12항에 있어서,상기 절연층은 유기 수지층을 포함하는 반도체 장치.
- 제12항 내지 제14항 중의 어느 하나에 따른 반도체 장치에서 상기 외부 접속용의 솔더가 전자 부품에 접속되어 있는 반도체 장치 패키지 구조.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-1999-00049450 | 1999-02-26 | ||
| JP4945099 | 1999-02-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2003-7015674A Division KR20040012877A (ko) | 1999-02-26 | 2000-02-09 | 반도체 장치 및 그 제조 방법 |
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| Publication Number | Publication Date |
|---|---|
| KR20020005592A true KR20020005592A (ko) | 2002-01-17 |
| KR100482721B1 KR100482721B1 (ko) | 2005-04-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR10-2003-7015674A Ceased KR20040012877A (ko) | 1999-02-26 | 2000-02-09 | 반도체 장치 및 그 제조 방법 |
| KR10-2001-7010540A Expired - Fee Related KR100482721B1 (ko) | 1999-02-26 | 2000-02-09 | 배선 기판 및 그 제조 방법, 반도체 장치 및 그 제조방법, 및 전자 기기 |
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| KR10-2003-7015674A Ceased KR20040012877A (ko) | 1999-02-26 | 2000-02-09 | 반도체 장치 및 그 제조 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (4) | US6515372B1 (ko) |
| KR (2) | KR20040012877A (ko) |
| TW (2) | TW556329B (ko) |
| WO (1) | WO2000052755A1 (ko) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013033034A3 (en) * | 2011-08-26 | 2013-04-25 | Lawrence Livermore National Security, Llc | Method for making high-density electrical interconnections using rivet bonds |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW556329B (en) * | 1999-02-26 | 2003-10-01 | Hitachi Ltd | Wiring board, its production method, semiconductor device and its production method |
| TW478089B (en) | 1999-10-29 | 2002-03-01 | Hitachi Ltd | Semiconductor device and the manufacturing method thereof |
| TW498468B (en) | 1999-10-29 | 2002-08-11 | Hitachi Ltd | Semiconductor device |
| KR100430203B1 (ko) | 1999-10-29 | 2004-05-03 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조 방법 |
| US6696765B2 (en) | 2001-11-19 | 2004-02-24 | Hitachi, Ltd. | Multi-chip module |
| JP2003045877A (ja) * | 2001-08-01 | 2003-02-14 | Sharp Corp | 半導体装置およびその製造方法 |
| US6727587B2 (en) * | 2002-04-30 | 2004-04-27 | Infineon Technologies Ag | Connection device and method for producing the same |
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- 2000-02-09 WO PCT/JP2000/000695 patent/WO2000052755A1/ja not_active Ceased
- 2000-02-09 KR KR10-2003-7015674A patent/KR20040012877A/ko not_active Ceased
- 2000-02-09 KR KR10-2001-7010540A patent/KR100482721B1/ko not_active Expired - Fee Related
- 2000-02-09 US US09/913,975 patent/US6515372B1/en not_active Expired - Fee Related
-
2002
- 2002-11-21 US US10/302,034 patent/US6756688B2/en not_active Expired - Fee Related
-
2004
- 2004-04-27 US US10/833,790 patent/US6998713B2/en not_active Expired - Fee Related
-
2005
- 2005-12-13 US US11/302,582 patent/US20060091553A1/en not_active Abandoned
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|---|---|---|---|---|
| WO2013033034A3 (en) * | 2011-08-26 | 2013-04-25 | Lawrence Livermore National Security, Llc | Method for making high-density electrical interconnections using rivet bonds |
Also Published As
| Publication number | Publication date |
|---|---|
| US20040201105A1 (en) | 2004-10-14 |
| US6756688B2 (en) | 2004-06-29 |
| TW556329B (en) | 2003-10-01 |
| US20060091553A1 (en) | 2006-05-04 |
| US6515372B1 (en) | 2003-02-04 |
| TW536794B (en) | 2003-06-11 |
| KR100482721B1 (ko) | 2005-04-13 |
| US20030104183A1 (en) | 2003-06-05 |
| US6998713B2 (en) | 2006-02-14 |
| KR20040012877A (ko) | 2004-02-11 |
| WO2000052755A1 (fr) | 2000-09-08 |
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