KR970053677A - 히트싱크가 부착된 컬럼형 패키지 - Google Patents

히트싱크가 부착된 컬럼형 패키지 Download PDF

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Publication number
KR970053677A
KR970053677A KR1019950067332A KR19950067332A KR970053677A KR 970053677 A KR970053677 A KR 970053677A KR 1019950067332 A KR1019950067332 A KR 1019950067332A KR 19950067332 A KR19950067332 A KR 19950067332A KR 970053677 A KR970053677 A KR 970053677A
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South Korea
Prior art keywords
heat sink
leads
package
semiconductor chip
type package
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KR1019950067332A
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KR100206880B1 (ko
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김선동
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문정환
Lg 반도체 주식회사
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Priority to KR1019950067332A priority Critical patent/KR100206880B1/ko
Application filed by 문정환, Lg 반도체 주식회사 filed Critical 문정환
Priority to US08/749,963 priority patent/US5877561A/en
Priority to JP8342950A priority patent/JP2819282B2/ja
Priority to CN96114083A priority patent/CN1065659C/zh
Publication of KR970053677A publication Critical patent/KR970053677A/ko
Publication of KR100206880B1 publication Critical patent/KR100206880B1/ko
Application granted granted Critical
Priority to US09/412,646 priority patent/US6181560B1/en
Assigned to 주식회사 하이닉스반도체 reassignment 주식회사 하이닉스반도체 권리의 전부이전등록 Assignors: 엘지반도체 주식회사
Assigned to 매그나칩 반도체 유한회사 reassignment 매그나칩 반도체 유한회사 권리의 전부이전등록 Assignors: 주식회사 하이닉스반도체
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/01—Manufacture or treatment
    • H10W40/03—Manufacture or treatment of arrangements for cooling
    • H10W40/037—Assembling together parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/10—Arrangements for heating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/657—Shapes or dispositions of interconnections on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/651—Materials of strap connectors
    • H10W72/652—Materials of strap connectors comprising metals or metalloids, e.g. silver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

본 발명은 몸체의 상하면에 다수개의 리드와 히트싱크가 노출되도록 매설하여 외부의 충격으로부터 리드를 보호하고, 인쇄회로기판에 실장이 용이하고 또한 열방출효과를 높일 수 있도록 된 히트싱크가 부착된 컬럼형 패키지에 관한것으로, 그 구성은 소정두께로 그의 평면이 소정형상을 가진 몸체(11)와, 상기 몸체(11)의 상하면으로 노출되도록 매설된 다수개의 리드(12) 및 히트싱크(13)와, 다수개의 몬드패드가 그의 상면에 형성되어 있고, 상기 몸체(11)의 상면에 부착되는 반도체칩(15)과, 상기 몸체(11)의 리드(12)와 상기 반도체칩(15)의 다수개의 본드패드를 전기적으로 연결하는 금속와이어(14)와, 상기 반도체칩(15)과, 다수개의 리드(12)와, 금속와이어(14)를 포함하는 일정면적을 밀봉시키는 몰딩과정에 이용되는 에폭시몰딩컴파운드(epoxy molding compuond)로 구성된다.

Description

히트싱크가 부착된 컬럼형 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 유니트 컬럼프레임과 컷팅된 몸체를 나타낸 사시도.

Claims (9)

  1. 소정두께로 그의 평면이 소정형상을 가진 몸체(11)와, 상기 몸체(11)의 상하면으로 노출되도록 매설된 다수개의 리드(12) 및 히트싱크(13)와, 다수개의 본드패드가 그의 상면에 형성되어있고, 상기 몸체(11)의 상면에 부착되는 반도체칩(15)과, 상기 몸체(11)의 리드(12)와 상기 반도체칩(15)의 다수개의 본드패드를 전기적으로 연결하는 금속와이어(14)와, 상기 반도체칩(15)과, 다수개의 리드(12)와, 금속와이어(14)를 포함하는 일정면적을 밀봉시키는 볼딩과정에 이용되는 에폭시몰딩컴파운드(epoxy molding compound)로 구성된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  2. 제1항에 있어서, 상기 몸체(11)는 그의 상면에 단차(11a)가 형성된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  3. 제1항에 있어서, 상기 몸체(11)는 절연성재질로 된 것을 특징으로 하는 히ㅐ트싱크가 부착된 컬럼형 패키지.
  4. 제1항에 있어서, 상기 몸체(11)에는 다수개의 반도체칩(11)이 안착될 수 있도록 된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  5. 제1항에 있어서, 상기 몸체(11)는 그의 평면형상이 원형인 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  6. 제1항에 있어서, 상기 몸체(11)는 그의 평면형상이 사각형인 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  7. 제5항에 있어서, 상기 리드(12)는 상기 몸체(11)의 외측에 일측면애 노출되는 매설된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  8. 제6항에 있어서, 상기 리드(12)는 상기 몸체(11)의 외측에 일측면이 노출되는 매설된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
  9. 소정두께로 그의 평면이 소정형상을 가지고 일정영역이 상방에서 하방으로 소정깊이를 가지고 홈(11a)가 형성된 몸체(11)와, 상기 몸체(11)의 상하면으로 노출되도록 매설된 다수개의 리드(12) 및 히트싱크(13)와, 다수개의 본드패드가 그의 상면에 형성되어있고, 상기 몸체(11)의 상면에 부착되는 반도체칩(15)과, 상기 몸체(11)의 리드(12)와 상기 반도체칩(15)의 다수개의 본드패드를 전기적으로 연결하는 금속와이어(14)와, 상기 몸체(11)의 상면은 커버(20)를 통해 밀봉되되, 상기 커버(20)는 상기 몸체(11)와 동일위치에 다수개의 리드(12) 및 히트싱크(13)가 노출되도록 매설되어 상기 몸체(11)와 전기적으로 연결된 것을 특징으로 하는 히트싱크가 부착된 컬럼형 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950067332A 1995-07-28 1995-12-29 히트싱크가 부착된 컬럼형 패키지 Expired - Lifetime KR100206880B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019950067332A KR100206880B1 (ko) 1995-12-29 1995-12-29 히트싱크가 부착된 컬럼형 패키지
US08/749,963 US5877561A (en) 1995-07-28 1996-11-18 Plate and column type semiconductor package having heat sink
JP8342950A JP2819282B2 (ja) 1995-12-29 1996-12-24 半導体パッケージおよびその製造方法
CN96114083A CN1065659C (zh) 1995-12-29 1996-12-26 具有热沉的平板型半导体封装
US09/412,646 US6181560B1 (en) 1995-07-28 1999-10-05 Semiconductor package substrate and semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950067332A KR100206880B1 (ko) 1995-12-29 1995-12-29 히트싱크가 부착된 컬럼형 패키지

Publications (2)

Publication Number Publication Date
KR970053677A true KR970053677A (ko) 1997-07-31
KR100206880B1 KR100206880B1 (ko) 1999-07-01

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KR1019950067332A Expired - Lifetime KR100206880B1 (ko) 1995-07-28 1995-12-29 히트싱크가 부착된 컬럼형 패키지

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JP (1) JP2819282B2 (ko)
KR (1) KR100206880B1 (ko)
CN (1) CN1065659C (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230098774A (ko) * 2020-11-17 2023-07-04 재팬 일렉트로닉 메트리얼스 코오포레이숀 프로브 카드용 다층 배선 기판 및 프로브 카드

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1420035B1 (en) 2002-11-12 2007-06-06 Nitto Denko Corporation Filled epoxy resin composition for semiconductor encapsulation and semiconductor using same
TWI233188B (en) 2003-10-07 2005-05-21 United Microelectronics Corp Quad flat no-lead package structure and manufacturing method thereof
CN100369241C (zh) * 2003-10-13 2008-02-13 联华电子股份有限公司 四方扁平无接脚型态的晶片封装结构及其工艺
CN102437824B (zh) * 2011-12-05 2015-03-11 北京大学 一种直冷式高集成度电荷灵敏前置放大器
CN105914191B (zh) * 2016-06-20 2018-03-16 深圳市宏钢机械设备有限公司 一种水冷散热的集成电路封装

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2612455B2 (ja) * 1987-09-30 1997-05-21 イビデン株式会社 半導体素子搭載用基板
IT1252136B (it) * 1991-11-29 1995-06-05 St Microelectronics Srl Struttura di dispositivo a semiconduttore con dissipatore metallico e corpo in plastica, con mezzi per una connessione elettrica al dissipatore di alta affidabilita'

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230098774A (ko) * 2020-11-17 2023-07-04 재팬 일렉트로닉 메트리얼스 코오포레이숀 프로브 카드용 다층 배선 기판 및 프로브 카드

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CN1156903A (zh) 1997-08-13
JP2819282B2 (ja) 1998-10-30
KR100206880B1 (ko) 1999-07-01
CN1065659C (zh) 2001-05-09
JPH09186273A (ja) 1997-07-15

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