KR970077146A - 집적회로 에어 브리지 구조 및 그것을 형성하기 위한 방법 - Google Patents
집적회로 에어 브리지 구조 및 그것을 형성하기 위한 방법 Download PDFInfo
- Publication number
- KR970077146A KR970077146A KR1019970019607A KR19970019607A KR970077146A KR 970077146 A KR970077146 A KR 970077146A KR 1019970019607 A KR1019970019607 A KR 1019970019607A KR 19970019607 A KR19970019607 A KR 19970019607A KR 970077146 A KR970077146 A KR 970077146A
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- air bridge
- cavity
- handle wafer
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
- H10W20/483—Interconnections over air gaps, e.g. air bridges
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/021—Manufacture or treatment of air gaps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/20—Air gaps
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
Claims (8)
- 접합된 웨이퍼에 에어 브리지를 형성하기 위한 방법에 있어서; 핸들 기판에 공동을 형성하는 단계와; 디바이스 웨이퍼를 핸들 웨이퍼에 접합시키는 단계와; 상기 디바이스 위이퍼를 금속층으로 덮는 단계와; 핸들웨이퍼의 공동 위의 금속 리드선에 상기 금속층을 형성하는 단계를 포함하는 것을 특징으로 하는 접합된 웨이퍼에 에어 브리지를 형성하기 위한 방법.
- 제1항에 있어서, 공동의 표면을 유전체로 덮는 단계를 특징으로 하는 방법.
- 제1항 또는 제2항에 있어서, 디바이스 웨이퍼와 핸들 웨이퍼를 결합하는 산화막 단계를 특징으로 하는 방법.
- 제1항 내지 3항 중 어느 항에 있어서, 핸들웨이퍼에 있는 공동 주위의 개구트랜치에 대하여 이것의 표면에 유전체층을 증착하고 트랜치를 채우는 것을 특징으로 하는 방법.
- 제4항에 있어서, 제1금속층 위에 인터레벨 금속유전체층(ILD)을 증착하고, ILD층을 통해 콘택 바이어스를 열고, 상기 ILD층 위에 제2금속층을 증착하고, ILD에 있는 바이어스를 통해 제1금속층에 대한 콘택에 제2금속층의 일부를 형성하는 것을 특징으로 하는 방법.
- 접합된 웨이퍼상의 에어 브리지에 있어서;핸들 웨이퍼의 표면에 에어 브리지 공동을 가지는 핸들 웨이퍼와; 핸들 웨이퍼에 접합되고 에어 브리지 공동을 덮는 디바이스 웨이퍼와;디바이스 웨이퍼상의 금속리드선과; 에어 브리지 공동의 표면을 코팅하는 유전체층을 포함하는 것을 특징으로 하는 에어 브리지.
- 제6항에 있어서, 디바이스 웨이퍼에 있는 트랜치의 분리 및 에어 브리지 공동을 둘러싸는 것을 특징으로 하는 에어 브리지 구조.
- 제7항에 있어서, 트랜치 표면에 유전체 코팅을 특징으로 하는 에어 브리지 구조※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/650,762 US5949144A (en) | 1996-05-20 | 1996-05-20 | Pre-bond cavity air bridge |
| US08/650,762 | 1996-05-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR970077146A true KR970077146A (ko) | 1997-12-12 |
Family
ID=24610184
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019970019607A Ceased KR970077146A (ko) | 1996-05-20 | 1997-05-20 | 집적회로 에어 브리지 구조 및 그것을 형성하기 위한 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5949144A (ko) |
| EP (1) | EP0809288A3 (ko) |
| JP (1) | JPH1050826A (ko) |
| KR (1) | KR970077146A (ko) |
| CN (1) | CN1181624A (ko) |
| TW (1) | TW349233B (ko) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5767546A (en) * | 1994-12-30 | 1998-06-16 | Siliconix Incorporated | Laternal power mosfet having metal strap layer to reduce distributed resistance |
| US6492705B1 (en) * | 1996-06-04 | 2002-12-10 | Intersil Corporation | Integrated circuit air bridge structures and methods of fabricating same |
| US6236101B1 (en) * | 1997-11-05 | 2001-05-22 | Texas Instruments Incorporated | Metallization outside protective overcoat for improved capacitors and inductors |
| US6072213A (en) * | 1998-04-30 | 2000-06-06 | Advanced Micro Devices, Inc. | Transistor having an etchant-scalable channel length and method of making same |
| KR100268878B1 (ko) * | 1998-05-08 | 2000-10-16 | 김영환 | 반도체소자 및 그의 제조방법 |
| US6433401B1 (en) * | 1999-04-06 | 2002-08-13 | Analog Devices Imi, Inc. | Microfabricated structures with trench-isolation using bonded-substrates and cavities |
| US6465811B1 (en) * | 1999-07-12 | 2002-10-15 | Gore Enterprise Holdings, Inc. | Low-capacitance bond pads for high speed devices |
| US7335965B2 (en) | 1999-08-25 | 2008-02-26 | Micron Technology, Inc. | Packaging of electronic chips with air-bridge structures |
| US6677209B2 (en) * | 2000-02-14 | 2004-01-13 | Micron Technology, Inc. | Low dielectric constant STI with SOI devices |
| US6492209B1 (en) * | 2000-06-30 | 2002-12-10 | Advanced Micro Devices, Inc. | Selectively thin silicon film for creating fully and partially depleted SOI on same wafer |
| JP3957038B2 (ja) * | 2000-11-28 | 2007-08-08 | シャープ株式会社 | 半導体基板及びその作製方法 |
| JP2006511075A (ja) * | 2002-12-19 | 2006-03-30 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 無応力複合基板及びその製造方法 |
| JP4559839B2 (ja) * | 2004-12-13 | 2010-10-13 | トヨタ自動車株式会社 | 半導体装置の製造方法 |
| US7767589B2 (en) | 2007-02-07 | 2010-08-03 | Raytheon Company | Passivation layer for a circuit device and method of manufacture |
| US8173906B2 (en) * | 2007-02-07 | 2012-05-08 | Raytheon Company | Environmental protection coating system and method |
| CN104752424B (zh) * | 2013-12-27 | 2019-05-17 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法和电子装置 |
| CN105084296B (zh) * | 2014-04-25 | 2017-02-08 | 无锡华润上华半导体有限公司 | Mems电容式压力传感器的制作方法 |
| CN107078713B (zh) * | 2014-09-30 | 2021-10-26 | 株式会社村田制作所 | 梯型滤波器 |
| US9666703B2 (en) * | 2014-12-17 | 2017-05-30 | Great Wall Semiconductor Corporation | Semiconductor devices with cavities |
| US10461152B2 (en) | 2017-07-10 | 2019-10-29 | Globalfoundries Inc. | Radio frequency switches with air gap structures |
| US10833153B2 (en) | 2017-09-13 | 2020-11-10 | Globalfoundries Inc. | Switch with local silicon on insulator (SOI) and deep trench isolation |
| US10446643B2 (en) * | 2018-01-22 | 2019-10-15 | Globalfoundries Inc. | Sealed cavity structures with a planar surface |
| US11056382B2 (en) * | 2018-03-19 | 2021-07-06 | Globalfoundries U.S. Inc. | Cavity formation within and under semiconductor devices |
| US11410872B2 (en) | 2018-11-30 | 2022-08-09 | Globalfoundries U.S. Inc. | Oxidized cavity structures within and under semiconductor devices |
| US10923577B2 (en) | 2019-01-07 | 2021-02-16 | Globalfoundries U.S. Inc. | Cavity structures under shallow trench isolation regions |
| US11127816B2 (en) | 2020-02-14 | 2021-09-21 | Globalfoundries U.S. Inc. | Heterojunction bipolar transistors with one or more sealed airgap |
| CN111463136B (zh) * | 2020-04-30 | 2024-09-13 | 北京飞宇微电子电路有限责任公司 | 一种金属封装外壳及其制作方法和混合集成电路 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940020594A (ko) * | 1993-02-17 | 1994-09-16 | 김광호 | 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 |
| KR20020041765A (ko) * | 2000-11-28 | 2002-06-03 | 마찌다 가쯔히꼬 | 반도체 기판 및 그의 제조 방법 |
| KR100347740B1 (ko) * | 1998-09-22 | 2002-08-09 | 인터내셔널 비지네스 머신즈 코포레이션 | 전자 소자 및 채널 제조 방법 |
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-
1996
- 1996-05-20 US US08/650,762 patent/US5949144A/en not_active Expired - Lifetime
-
1997
- 1997-05-01 TW TW086105808A patent/TW349233B/zh active
- 1997-05-16 JP JP9126779A patent/JPH1050826A/ja not_active Withdrawn
- 1997-05-19 CN CN97111413A patent/CN1181624A/zh active Pending
- 1997-05-20 KR KR1019970019607A patent/KR970077146A/ko not_active Ceased
- 1997-05-20 EP EP97401106A patent/EP0809288A3/en not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940020594A (ko) * | 1993-02-17 | 1994-09-16 | 김광호 | 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법 |
| KR100347740B1 (ko) * | 1998-09-22 | 2002-08-09 | 인터내셔널 비지네스 머신즈 코포레이션 | 전자 소자 및 채널 제조 방법 |
| KR20020041765A (ko) * | 2000-11-28 | 2002-06-03 | 마찌다 가쯔히꼬 | 반도체 기판 및 그의 제조 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW349233B (en) | 1999-01-01 |
| EP0809288A2 (en) | 1997-11-26 |
| JPH1050826A (ja) | 1998-02-20 |
| EP0809288A3 (en) | 1999-01-13 |
| US5949144A (en) | 1999-09-07 |
| CN1181624A (zh) | 1998-05-13 |
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