NO20051806L - Beregningsmessig effektiv matematisk maskin - Google Patents

Beregningsmessig effektiv matematisk maskin

Info

Publication number
NO20051806L
NO20051806L NO20051806A NO20051806A NO20051806L NO 20051806 L NO20051806 L NO 20051806L NO 20051806 A NO20051806 A NO 20051806A NO 20051806 A NO20051806 A NO 20051806A NO 20051806 L NO20051806 L NO 20051806L
Authority
NO
Norway
Prior art keywords
computationally efficient
selectively controlled
efficient mathematical
mathematical engine
mathematical machine
Prior art date
Application number
NO20051806A
Other languages
English (en)
Norwegian (no)
Other versions
NO20051806D0 (no
Inventor
Stephan Shane Supplee
Ryan Samuel Buchert
Chayil Timmerman
Original Assignee
Interdigital Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interdigital Tech Corp filed Critical Interdigital Tech Corp
Publication of NO20051806D0 publication Critical patent/NO20051806D0/no
Publication of NO20051806L publication Critical patent/NO20051806L/no

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/015Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/16Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Algebra (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
  • Control Of Electric Motors In General (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Apparatus For Radiation Diagnosis (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Electrical Control Of Air Or Fuel Supplied To Internal-Combustion Engine (AREA)
  • Measuring Fluid Pressure (AREA)
NO20051806A 2002-09-24 2005-04-13 Beregningsmessig effektiv matematisk maskin NO20051806L (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41316402P 2002-09-24 2002-09-24
PCT/US2003/030089 WO2004029793A1 (en) 2002-09-24 2003-09-24 Computationally efficient mathematical engine

Publications (2)

Publication Number Publication Date
NO20051806D0 NO20051806D0 (no) 2005-04-13
NO20051806L true NO20051806L (no) 2005-06-08

Family

ID=32043214

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20051806A NO20051806L (no) 2002-09-24 2005-04-13 Beregningsmessig effektiv matematisk maskin

Country Status (11)

Country Link
US (2) US7430577B2 (de)
EP (2) EP2146278A1 (de)
JP (1) JP4263693B2 (de)
KR (3) KR20050099641A (de)
CN (1) CN1685309B (de)
AT (1) ATE456086T1 (de)
AU (1) AU2003270874A1 (de)
CA (1) CA2499929A1 (de)
DE (1) DE60331088D1 (de)
NO (1) NO20051806L (de)
WO (1) WO2004029793A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060149804A1 (en) * 2004-11-30 2006-07-06 International Business Machines Corporation Multiply-sum dot product instruction with mask and splat
KR20070075946A (ko) * 2006-01-17 2007-07-24 장영범 저전력 고속 푸리에 변환 방법 및 장치와, 이를 이용한통신 단말기
US20080071851A1 (en) * 2006-09-20 2008-03-20 Ronen Zohar Instruction and logic for performing a dot-product operation
US9495724B2 (en) * 2006-10-31 2016-11-15 International Business Machines Corporation Single precision vector permute immediate with “word” vector write mask
US8332452B2 (en) * 2006-10-31 2012-12-11 International Business Machines Corporation Single precision vector dot product with “word” vector write mask
US8175853B2 (en) * 2008-03-28 2012-05-08 International Business Machines Corporation Systems and methods for a combined matrix-vector and matrix transpose vector multiply for a block-sparse matrix
US8626815B1 (en) * 2008-07-14 2014-01-07 Altera Corporation Configuring a programmable integrated circuit device to perform matrix multiplication
CN101847093B (zh) * 2010-04-28 2013-09-04 中国科学院自动化研究所 具有可重构低功耗数据交织网络的数字信号处理器
CN102707931A (zh) * 2012-05-09 2012-10-03 刘大可 一种基于并行数据通道的数字信号处理器
US9503747B2 (en) * 2015-01-28 2016-11-22 Intel Corporation Threshold filtering of compressed domain data using steering vector
WO2017131711A1 (en) 2016-01-28 2017-08-03 Hewlett Packard Enterprise Development Lp Memristor crossbar array for performing a fourier transformation
US10089110B2 (en) * 2016-07-02 2018-10-02 Intel Corporation Systems, apparatuses, and methods for cumulative product
WO2019023910A1 (zh) * 2017-07-31 2019-02-07 深圳市大疆创新科技有限公司 数据处理方法和设备
US10754649B2 (en) 2018-07-24 2020-08-25 Apple Inc. Computation engine that operates in matrix and vector modes
US12153899B2 (en) 2020-12-23 2024-11-26 Intel Corporation Apparatus and method for complex matrix transpose and multiply
US12216734B2 (en) * 2020-12-23 2025-02-04 Intel Corporation Apparatus and method for conjugate transpose and multiply
US12174911B2 (en) 2020-12-23 2024-12-24 Intel Corporation Apparatus and method for complex matrix multiplication

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US3535694A (en) * 1968-01-15 1970-10-20 Ibm Information transposing system
JPS58207177A (ja) 1982-05-28 1983-12-02 Nec Corp 演算装置
US4811210A (en) 1985-11-27 1989-03-07 Texas Instruments Incorporated A plurality of optical crossbar switches and exchange switches for parallel processor computer
JPH0734228B2 (ja) 1987-02-23 1995-04-12 株式会社東芝 複合類似度法によるパタ−ン認識装置
JPH07113886B2 (ja) * 1987-05-11 1995-12-06 株式会社日立製作所 演算回路
US5268856A (en) * 1988-06-06 1993-12-07 Applied Intelligent Systems, Inc. Bit serial floating point parallel processing system and method
US5050119A (en) * 1989-10-06 1991-09-17 North American Philips Corporation Optimized sparse transversal filter
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US5301340A (en) * 1990-10-31 1994-04-05 International Business Machines Corporation IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle
US5487089A (en) * 1992-02-17 1996-01-23 Matsushita Electric Industrial Co., Ltd. Nyquist filter for digital modulation
JP3413940B2 (ja) 1994-03-29 2003-06-09 ソニー株式会社 演算回路
US5909572A (en) * 1996-12-02 1999-06-01 Compaq Computer Corp. System and method for conditionally moving an operand from a source register to a destination register
EP0854642A3 (de) * 1997-01-20 1999-10-20 Matsushita Electric Industrial Co., Ltd. Digitale Kamera mit auswechselbarer Anzeigevorrichtung
US6401194B1 (en) * 1997-01-28 2002-06-04 Samsung Electronics Co., Ltd. Execution unit for processing a data stream independently and in parallel
US5974435A (en) * 1997-08-28 1999-10-26 Malleable Technologies, Inc. Reconfigurable arithmetic datapath
US6317770B1 (en) * 1997-08-30 2001-11-13 Lg Electronics Inc. High speed digital signal processor
JP3765171B2 (ja) * 1997-10-07 2006-04-12 ヤマハ株式会社 音声符号化復号方式
DE69927075T2 (de) * 1998-02-04 2006-06-14 Texas Instruments Inc Rekonfigurierbarer Koprozessor mit mehreren Multiplizier-Akkumulier-Einheiten
US6334176B1 (en) * 1998-04-17 2001-12-25 Motorola, Inc. Method and apparatus for generating an alignment control vector
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Also Published As

Publication number Publication date
US7430577B2 (en) 2008-09-30
DE60331088D1 (de) 2010-03-11
WO2004029793A1 (en) 2004-04-08
US20080307205A1 (en) 2008-12-11
EP1546863B1 (de) 2010-01-20
CN1685309A (zh) 2005-10-19
ATE456086T1 (de) 2010-02-15
KR20050099641A (ko) 2005-10-14
EP1546863A4 (de) 2006-04-19
KR20050061477A (ko) 2005-06-22
US20040230632A1 (en) 2004-11-18
US8112467B2 (en) 2012-02-07
CA2499929A1 (en) 2004-04-08
EP1546863A1 (de) 2005-06-29
AU2003270874A1 (en) 2004-04-19
KR100708270B1 (ko) 2007-04-17
KR20090046939A (ko) 2009-05-11
EP2146278A1 (de) 2010-01-20
CN1685309B (zh) 2010-08-11
JP2006500684A (ja) 2006-01-05
NO20051806D0 (no) 2005-04-13
JP4263693B2 (ja) 2009-05-13

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