NO843375L - Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning - Google Patents

Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning

Info

Publication number
NO843375L
NO843375L NO843375A NO843375A NO843375L NO 843375 L NO843375 L NO 843375L NO 843375 A NO843375 A NO 843375A NO 843375 A NO843375 A NO 843375A NO 843375 L NO843375 L NO 843375L
Authority
NO
Norway
Prior art keywords
register
signals
data processing
processing system
register cells
Prior art date
Application number
NO843375A
Other languages
English (en)
Norwegian (no)
Inventor
James L King
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Publication of NO843375L publication Critical patent/NO843375L/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558—Addressing or selecting of subparts of the device under test
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2268—Logging of test results

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Communication Control (AREA)
NO843375A 1983-10-06 1984-08-23 Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning NO843375L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US53935583A 1983-10-06 1983-10-06

Publications (1)

Publication Number Publication Date
NO843375L true NO843375L (no) 1985-04-09

Family

ID=24150874

Family Applications (1)

Application Number Title Priority Date Filing Date
NO843375A NO843375L (no) 1983-10-06 1984-08-23 Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning

Country Status (6)

Country Link
EP (1) EP0145866A3 (de)
JP (1) JPS60151755A (de)
KR (1) KR850003006A (de)
AU (1) AU3338184A (de)
FI (1) FI843878L (de)
NO (1) NO843375L (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4581738A (en) * 1983-10-06 1986-04-08 Honeywell Information Systems Inc. Test and maintenance method and apparatus for a data processing system
GB8518859D0 (en) * 1985-07-25 1985-08-29 Int Computers Ltd Digital integrated circuits
GB8518860D0 (en) * 1985-07-25 1985-08-29 Int Computers Ltd Digital integrated circuits
JPS63291134A (ja) * 1987-05-22 1988-11-29 Toshiba Corp 論理集積回路
US5267246A (en) * 1988-06-30 1993-11-30 International Business Machines Corporation Apparatus and method for simultaneously presenting error interrupt and error data to a support processor
KR920001079B1 (ko) * 1989-06-10 1992-02-01 삼성전자 주식회사 직렬데이타 통로가 내장된 메모리소자의 테스트방법
US5428623A (en) * 1993-07-01 1995-06-27 Tandem Computers Incorporated Scannable interface to nonscannable microprocessor
GB9421977D0 (en) * 1994-10-31 1994-12-21 Inmos Ltd A scan latch and test method therefor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3790885A (en) * 1972-03-27 1974-02-05 Ibm Serial test patterns for mosfet testing
JPS5352029A (en) * 1976-10-22 1978-05-12 Fujitsu Ltd Arithmetic circuit unit
US4312066A (en) * 1979-12-28 1982-01-19 International Business Machines Corporation Diagnostic/debug machine architecture

Also Published As

Publication number Publication date
KR850003006A (ko) 1985-05-28
EP0145866A3 (de) 1988-01-27
AU3338184A (en) 1985-04-18
FI843878A7 (fi) 1985-04-07
FI843878L (fi) 1985-04-07
EP0145866A2 (de) 1985-06-26
JPS60151755A (ja) 1985-08-09
FI843878A0 (fi) 1984-10-03

Similar Documents

Publication Publication Date Title
NO843374L (no) Undersoekelses og vedlikeholdsmetode for et databehandlingssystem og anordning til metodens utfoerelse
US4622647A (en) System for the automatic testing of printed circuits
US3497685A (en) Fault location system
US4620302A (en) Programmable digital signal testing system
US7787577B2 (en) Asynchronous interface methods and apparatus
JPH06500392A (ja) 集積回路およびその集積回路をテストする方法
NO162438B (no) Automatisk testsystem.
KR970051348A (ko) 필드 프로그래머블 게이트 어레이 및 그 테스트 방법
EP2006697A1 (de) Steuervorrichtung
CN111858222B (zh) 错误注入的方法、设备、数据存储系统和程序产品
NO843375L (no) Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning
US4145734A (en) Method and apparatus for implementing the test of computer functional units
KR870000114B1 (ko) 데이타 처리 시스템
US4567593A (en) Apparatus for verification of a signal transfer in a preselected path in a data processing system
CN101458624B (zh) 可编程逻辑器件的加载方法、处理器和装置
US4720672A (en) Testability system
US3999053A (en) Interface for connecting a data-processing unit to an automatic diagnosis system
US5751736A (en) Testable electronic system
US3649910A (en) Method and apparatus for generating diagnostic information
US4625312A (en) Test and maintenance method and apparatus for investigation of intermittent faults in a data processing system
US3814920A (en) Employing variable clock rate
JP5032764B2 (ja) 産業用装置の装置コントローラ
JP3654629B2 (ja) スキャンレジスタチェーンを有する集積回路
US7587649B2 (en) Testing of reconfigurable logic and interconnect sources
JP5176962B2 (ja) プリント板接続試験装置および方法