PL1594165T3 - Sposób wykonania izolacji elektrycznej podłoża dla modułu mocy - Google Patents

Sposób wykonania izolacji elektrycznej podłoża dla modułu mocy

Info

Publication number
PL1594165T3
PL1594165T3 PL05009075T PL05009075T PL1594165T3 PL 1594165 T3 PL1594165 T3 PL 1594165T3 PL 05009075 T PL05009075 T PL 05009075T PL 05009075 T PL05009075 T PL 05009075T PL 1594165 T3 PL1594165 T3 PL 1594165T3
Authority
PL
Poland
Prior art keywords
substrate
power module
electrical insulation
casing
recess
Prior art date
Application number
PL05009075T
Other languages
English (en)
Inventor
Karlheinz Augustin
Christian Göbl
Original Assignee
Semikron Elektronik Gmbh & Co Kg Patentabteilung
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron Elektronik Gmbh & Co Kg Patentabteilung filed Critical Semikron Elektronik Gmbh & Co Kg Patentabteilung
Publication of PL1594165T3 publication Critical patent/PL1594165T3/pl

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H10W76/42—Fillings
    • H10W76/47—Solid or gel fillings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5438—Dispositions of bond wires the bond wires having multiple connections on the same bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5453—Dispositions of bond wires connecting between multiple bond pads on a chip, e.g. daisy chain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Processing Of Terminals (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
PL05009075T 2004-05-04 2005-04-26 Sposób wykonania izolacji elektrycznej podłoża dla modułu mocy PL1594165T3 (pl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004021927A DE102004021927B4 (de) 2004-05-04 2004-05-04 Verfahren zur inneren elektrischen Isolation eines Substrats für ein Leistungshalbleitermodul
EP05009075A EP1594165B1 (de) 2004-05-04 2005-04-26 Verfahren zur elektrischen Isolation eines Substrats für ein Leistungsmodul

Publications (1)

Publication Number Publication Date
PL1594165T3 true PL1594165T3 (pl) 2008-11-28

Family

ID=34935721

Family Applications (1)

Application Number Title Priority Date Filing Date
PL05009075T PL1594165T3 (pl) 2004-05-04 2005-04-26 Sposób wykonania izolacji elektrycznej podłoża dla modułu mocy

Country Status (8)

Country Link
US (1) US7723244B2 (pl)
EP (1) EP1594165B1 (pl)
JP (1) JP4783583B2 (pl)
AT (1) ATE398336T1 (pl)
DE (2) DE102004021927B4 (pl)
DK (1) DK1594165T3 (pl)
ES (1) ES2308330T3 (pl)
PL (1) PL1594165T3 (pl)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005059360B4 (de) * 2005-12-13 2011-09-22 Semikron Elektronik Gmbh & Co. Kg Vorrichtung und Verfahren zum Verguss von Schaltungsanordnungen
DE102006006425B4 (de) * 2006-02-13 2009-06-10 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul in Druckkontaktausführung
DE102006006424B4 (de) 2006-02-13 2011-11-17 Semikron Elektronik Gmbh & Co. Kg Anordnung mit mindestens einem Leistungshalbleitermodul und einem Kühlbauteil und zugehöriges Herstellungsverfahren
FR2905379B1 (fr) * 2006-09-04 2008-11-07 Bertin Technologies Soc Par Ac Dispositif de collecte et de separation de particules et de microorganismes presents dans l'air ambiant
US8164176B2 (en) 2006-10-20 2012-04-24 Infineon Technologies Ag Semiconductor module arrangement
DE102006058692A1 (de) * 2006-12-13 2008-06-26 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit Kontaktfedern
DE102007024159B3 (de) * 2007-05-24 2008-11-06 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul
DE102008017454B4 (de) 2008-04-05 2010-02-04 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit hermetisch dichter Schaltungsanordnung und Herstellungsverfahren hierzu
DE102009000885A1 (de) 2009-02-16 2010-08-26 Semikron Elektronik Gmbh & Co. Kg Halbleitermodul
DE102009000884B3 (de) 2009-02-16 2010-10-07 Semikron Elektronik Gmbh & Co. Kg Halbleitermodul mit Gehäuse aus präkeramischem Polymer
DE102009046858B3 (de) * 2009-11-19 2011-05-05 Infineon Technologies Ag Leistungshalbleitermodul und Verfahren zum Betrieb eines Leistungshalbleitermoduls
US8511851B2 (en) * 2009-12-21 2013-08-20 Cree, Inc. High CRI adjustable color temperature lighting devices
DE102011004544B4 (de) * 2011-02-22 2013-06-13 Semikron Elektronik Gmbh & Co. Kg Schaltungsanordnung
JP5762902B2 (ja) 2011-09-16 2015-08-12 日本発條株式会社 接触端子
JP6825306B2 (ja) * 2016-11-02 2021-02-03 富士電機株式会社 半導体装置
DE102018133456A1 (de) * 2018-12-21 2020-06-25 Rogers Germany Gmbh Verfahren zum Verkapseln mindestens eines Trägersubstrats, Elektronikmodul und Werkzeug zum Verkapseln eines Trägersubstrats
DE112019007537B4 (de) 2019-07-11 2025-01-09 Mitsubishi Electric Corporation Halbleitervorrichtung und Leistungswandler
DE102020131493B4 (de) 2020-11-27 2023-04-13 Semikron Elektronik Gmbh & Co. Kg Verkettete Anlage und Verfahren zur inneren elektrischen Isolation einer leistungselektronischen Schalteinrichtung

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Also Published As

Publication number Publication date
JP2005322902A (ja) 2005-11-17
DE102004021927A1 (de) 2005-12-01
EP1594165A3 (de) 2007-06-27
ES2308330T3 (es) 2008-12-01
US7723244B2 (en) 2010-05-25
DE102004021927B4 (de) 2008-07-03
DE502005004373D1 (de) 2008-07-24
US20050250247A1 (en) 2005-11-10
JP4783583B2 (ja) 2011-09-28
EP1594165A2 (de) 2005-11-09
DK1594165T3 (da) 2008-10-06
ATE398336T1 (de) 2008-07-15
EP1594165B1 (de) 2008-06-11

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