PL4298666T3 - Podłoże opakowaniowe i urządzenie półprzewodnikowe zawierające takie podłoże - Google Patents

Podłoże opakowaniowe i urządzenie półprzewodnikowe zawierające takie podłoże

Info

Publication number
PL4298666T3
PL4298666T3 PL22796777.5T PL22796777T PL4298666T3 PL 4298666 T3 PL4298666 T3 PL 4298666T3 PL 22796777 T PL22796777 T PL 22796777T PL 4298666 T3 PL4298666 T3 PL 4298666T3
Authority
PL
Poland
Prior art keywords
same
semiconductor device
packaging substrate
packaging
substrate
Prior art date
Application number
PL22796777.5T
Other languages
English (en)
Inventor
Youngho RHO
Jincheol Kim
Original Assignee
Absolics Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Absolics Inc. filed Critical Absolics Inc.
Publication of PL4298666T3 publication Critical patent/PL4298666T3/pl

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/20Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/692Ceramics or glasses
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H05K1/186Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or connecting to patterned circuits before or during embedding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07254Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • H10W72/247Dispositions of multiple bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Dicing (AREA)
PL22796777.5T 2021-04-30 2022-04-28 Podłoże opakowaniowe i urządzenie półprzewodnikowe zawierające takie podłoże PL4298666T3 (pl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020210056448A KR102515303B1 (ko) 2021-04-30 2021-04-30 패키징 기판 및 이를 포함하는 반도체 장치
PCT/US2022/026847 WO2022232467A1 (en) 2021-04-30 2022-04-28 Packaging substrate and semiconductor device comprising the same

Publications (1)

Publication Number Publication Date
PL4298666T3 true PL4298666T3 (pl) 2025-12-08

Family

ID=83848678

Family Applications (1)

Application Number Title Priority Date Filing Date
PL22796777.5T PL4298666T3 (pl) 2021-04-30 2022-04-28 Podłoże opakowaniowe i urządzenie półprzewodnikowe zawierające takie podłoże

Country Status (8)

Country Link
US (1) US12456653B2 (pl)
EP (1) EP4298666B1 (pl)
JP (1) JP7546075B2 (pl)
KR (1) KR102515303B1 (pl)
CN (1) CN115917730A (pl)
PL (1) PL4298666T3 (pl)
TW (1) TWI792999B (pl)
WO (1) WO2022232467A1 (pl)

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WO2022055945A1 (en) * 2020-09-09 2022-03-17 Medtronic, Inc. Electronic package and implantable medical device including same
US20230085411A1 (en) * 2021-09-16 2023-03-16 Intel Corporation Glass core with cavity structure for heterogeneous packaging architecture
KR20240057081A (ko) * 2022-10-24 2024-05-02 삼성전자주식회사 반도체 패키지 및 그 제조 방법
KR102936625B1 (ko) * 2022-11-15 2026-03-06 앱솔릭스 인코포레이티드 기판 및 반도체 모듈
KR102933701B1 (ko) * 2022-12-02 2026-03-03 앱솔릭스 인코포레이티드 반도체 패키징용 기판, 반도체 패키지 및 반도체 패키징용 기판의 제조방법
US20240327201A1 (en) * 2023-03-29 2024-10-03 Intel Corporation Mems dies embedded in glass cores
US20240332195A1 (en) * 2023-04-02 2024-10-03 Intel Corporation Spray-coated photoresist and photoimageable dielectrics to enable tsv bridge for glass core packages
US20250069965A1 (en) * 2023-08-25 2025-02-27 Qualcomm Incorporated Package comprising a substrate with an embedded frame
US20250079244A1 (en) * 2023-08-30 2025-03-06 Absolics Inc. Method of manufacturing packaging substrate and packaging substrate manufactured thereby
US20250079324A1 (en) * 2023-08-30 2025-03-06 Absolics Inc. Method of manufacturing packaging substrate and packaging substrate manufactured thereby
US20250079243A1 (en) * 2023-08-30 2025-03-06 Absolics Inc. Packaging substrate and method of manufacturing the same
EP4530691A1 (en) * 2023-09-27 2025-04-02 Absolics Inc. Manufacturing method of packaging substrate and packaging substrate using the same
KR20250064590A (ko) * 2023-10-31 2025-05-09 앱솔릭스 인코포레이티드 패키징 기판 및 패키징 기판의 제조 방법
EP4550406A1 (en) * 2023-10-31 2025-05-07 Absolics Inc. Packaging substrate and manufacturing method of packaging substrate
KR20250065219A (ko) * 2023-11-02 2025-05-12 앱솔릭스 인코포레이티드 패키징 기판 및 패키징 기판의 제조 방법
KR20250099431A (ko) * 2023-12-24 2025-07-01 앱솔릭스 인코포레이티드 패키징 기판에 포함되는 기판 및 기판의 제조방법
KR20250099432A (ko) * 2023-12-24 2025-07-01 앱솔릭스 인코포레이티드 패키징 기판의 제조 방법 및 이를 이용한 패키징 기판
KR102886059B1 (ko) * 2023-12-27 2025-11-12 앱솔릭스 인코포레이티드 패키징 기판의 제조방법
KR20250101308A (ko) * 2023-12-27 2025-07-04 앱솔릭스 인코포레이티드 패키징 기판이 배치된 기판의 제조 방법

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US11652039B2 (en) * 2019-03-12 2023-05-16 Absolics Inc. Packaging substrate with core layer and cavity structure and semiconductor device comprising the same
CN111312697B (zh) * 2020-02-28 2022-02-22 西安微电子技术研究所 一种三维堆叠集成结构及其多芯片集成结构和制备方法

Also Published As

Publication number Publication date
CN115917730A (zh) 2023-04-04
TWI792999B (zh) 2023-02-11
EP4298666A4 (en) 2024-09-18
JP2023536041A (ja) 2023-08-23
US20230307304A1 (en) 2023-09-28
KR20220149170A (ko) 2022-11-08
EP4298666C0 (en) 2025-10-22
TW202245157A (zh) 2022-11-16
KR102515303B1 (ko) 2023-03-29
US12456653B2 (en) 2025-10-28
WO2022232467A1 (en) 2022-11-03
EP4298666A1 (en) 2024-01-03
EP4298666B1 (en) 2025-10-22
JP7546075B2 (ja) 2024-09-05

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