SE9704149D0 - A semiconductor device of SiC and a transistor of SiC having an insulated gate - Google Patents

A semiconductor device of SiC and a transistor of SiC having an insulated gate

Info

Publication number
SE9704149D0
SE9704149D0 SE9704149A SE9704149A SE9704149D0 SE 9704149 D0 SE9704149 D0 SE 9704149D0 SE 9704149 A SE9704149 A SE 9704149A SE 9704149 A SE9704149 A SE 9704149A SE 9704149 D0 SE9704149 D0 SE 9704149D0
Authority
SE
Sweden
Prior art keywords
sic
semiconductor device
blocking state
transistor
insulated gate
Prior art date
Application number
SE9704149A
Other languages
English (en)
Swedish (sv)
Inventor
Bo Bijlenga
Lennart Zdansky
Christopher Harris
Mietek Bakowski
Andrey Konstantinov
Ulf Gustafsson
Original Assignee
Abb Research Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Research Ltd filed Critical Abb Research Ltd
Priority to SE9704149A priority Critical patent/SE9704149D0/xx
Publication of SE9704149D0 publication Critical patent/SE9704149D0/xx
Priority to US08/971,682 priority patent/US6091108A/en
Priority to EP98956064A priority patent/EP1029363A2/fr
Priority to JP2000521555A priority patent/JP2001523895A/ja
Priority to PCT/SE1998/002048 priority patent/WO1999026296A2/fr
Priority to EP09174562A priority patent/EP2144277A3/fr
Priority to JP2012120452A priority patent/JP5829975B2/ja

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
SE9704149A 1997-11-13 1997-11-13 A semiconductor device of SiC and a transistor of SiC having an insulated gate SE9704149D0 (sv)

Priority Applications (7)

Application Number Priority Date Filing Date Title
SE9704149A SE9704149D0 (sv) 1997-11-13 1997-11-13 A semiconductor device of SiC and a transistor of SiC having an insulated gate
US08/971,682 US6091108A (en) 1997-11-13 1997-11-17 Semiconductor device of SiC having an insulated gate and buried grid region for high breakdown voltage
EP98956064A EP1029363A2 (fr) 1997-11-13 1998-11-13 DISPOSITIF SEMICONDUCTEUR AU SiC ET TRANSISTOR SiC A GRILLE ISOLEE
JP2000521555A JP2001523895A (ja) 1997-11-13 1998-11-13 半導体デバイスおよびＳｉＣトランジスタ
PCT/SE1998/002048 WO1999026296A2 (fr) 1997-11-13 1998-11-13 DISPOSITIF SEMICONDUCTEUR AU SiC ET TRANSISTOR SiC A GRILLE ISOLEE
EP09174562A EP2144277A3 (fr) 1997-11-13 1998-11-13 Transistor de SiC doté d'une grille isolée
JP2012120452A JP5829975B2 (ja) 1997-11-13 2012-05-28 半導体デバイスおよびＳｉＣトランジスタ

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9704149A SE9704149D0 (sv) 1997-11-13 1997-11-13 A semiconductor device of SiC and a transistor of SiC having an insulated gate
US08/971,682 US6091108A (en) 1997-11-13 1997-11-17 Semiconductor device of SiC having an insulated gate and buried grid region for high breakdown voltage

Publications (1)

Publication Number Publication Date
SE9704149D0 true SE9704149D0 (sv) 1997-11-13

Family

ID=20408960

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9704149A SE9704149D0 (sv) 1997-11-13 1997-11-13 A semiconductor device of SiC and a transistor of SiC having an insulated gate

Country Status (5)

Country Link
US (1) US6091108A (fr)
EP (2) EP2144277A3 (fr)
JP (2) JP2001523895A (fr)
SE (1) SE9704149D0 (fr)
WO (1) WO1999026296A2 (fr)

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Also Published As

Publication number Publication date
EP2144277A3 (fr) 2010-03-17
WO1999026296A3 (fr) 1999-07-29
EP2144277A2 (fr) 2010-01-13
JP2012191229A (ja) 2012-10-04
US6091108A (en) 2000-07-18
EP1029363A2 (fr) 2000-08-23
JP5829975B2 (ja) 2015-12-09
JP2001523895A (ja) 2001-11-27
WO1999026296A2 (fr) 1999-05-27

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